7000 Series plug-in interface

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The 7000-series scopes have two categories of slots, horizontal and vertical, that have partly different but compatible interconnects so that vertical plugins can be installed in horizontal slots and vice versa, but not with all functions.

The interconnect is a 76-pin PCB edge connector. Looking into the mainframe from the front panel, "A" pins are left and "B" are right of the connector centerline, and pins are numbered from 1 at the bottom to 38 on the top. (A pins are on the plug-in PCB's component side, B pins on the solder side.) In the following table, (H) indicates signals available in horizontal slots only, and (V) denotes signals available in vertical slots only.

  A side B side
Pin Function Function
1 Sweep Gate (H) Delay mode ctl in (H)
2 Gate common Delay mode ctl out (V)
3 A Sweep [note 1] B Sweep [note 1]
4 Line trigger Trigger holdoff (H)
5 Chop drive Aux Swp gate (H)
6 Chop common ALT drive
7 Intensity Limit (H) MF Channel Switch
8 +5 V Sweep inhibit (H)
9 +5 V (lights) Delay gate (H)
10 Ready (H) X comp inhibit (H)
11 +Signal −Signal
12 Signal Ground Signal Ground
13 +Trigger (V) [note 2] −Trigger (V) [note 2]
14 Lights common Dual beam Aux Y-Axis (7844)
15 Single sweep logic Single sweep reset (H)
16 MF Mode Aux Y axis (H)
17 Aux Z axis Aux Z common
18 +15 V -15 V
19 +50 V -50 V
20 +Trigger in (H) −Trigger in (H)
21 +Aux trigger in (H) −Aux trigger in (H)
22 /EOI /SRQ
23 /DAV REN
24 /IFC /ATN
25 /NDAC /NRFD
26 Logic Common /SND
27 -5.2 V [note 3] 5.1 V [note 3]
28 n.c. n.c.
29 TS10 TS9 (DIO8)
30 TS8 (DIO7) TS7 (DIO6)
31 TS6 (DIO5) TS5 (DIO4)
32 TS4 (DIO3) TS3 (DIO2)
33 TS2 (DIO1) TS1
34 n.c. n.c.
35 Force readout Plugin mode
36 n.c. n.c.
37 Ch. 1 Col Ch. 1 Row
38 Ch. 2 Col Ch. 2 Row

Pin group function legend

Plugin power
HF signals
Readout system signals
IEEE-488 bus used in 7A16P, 7A29P, 7B90P, digitizer mainframes; data 1-8 on TS2-TS9 lines

Description of signals

  • Sweep Gate
  • Delay Mode Control in − >+3 V disables auto sweep in delayed timebase; 0 V enables independent timebase function
  • A/B Sweep
  • Line Trigger − Approx. 1 VRMS mains-frequency signal from power supply (through transformer)
  • Trigger Holdoff
  • Chop Drive
  • Chop Mode Sense
  • Aux Sweep Gate
  • Alt Drive
  • Intensity Limit
  • Mainframe Channel Switch
  • Sweep Inhibit
  • Delay Gate
  • Signal − Signal output from plugin to mainframe. Differential, 50 Ω per side.
  • Trigger − Copy of signal output from V plugin to mainframe. Differential, 50 Ω per side.
  • Aux Y-Axis − Current-driven input to mainframe allowing vertical separation of two traces with dual timebase plugins.
  • Dual Beam Aux Y-Axis
  • Single Sweep Logic
  • Single Sweep Reset
  • Mainframe Mode
  • Aux Z Axis − Current-driven input to mainframe allowing plugins to modulate beam intensity, e.g. in dual timebase A intensified by B display mode.
  • Trigger In − Trigger signal input on H plugin, routed from V plugin's trigger output. Differential, 50 Ω per side.
  • Aux Trigger In
  • GPIB lines − Control signal functions are the same as their IEEE-488 (GPIB) equivalents. Time slot lines 2 to 9 double as IEEE-488 data lines.
  • TS1−TS10readout system time slot pulses. Idle 0, active −15 V.
  • Force Readout
  • Plugin Mode
  • Ch1/2 Row/Col − Analog current inputs to the readout system. Ch1 refers to the first channel within the plugin slot in question and is associated with the readout field on top of the screen. Ch2 is the 2nd channel displayed at the bottom. Row/Current signals accept negative currents in 100 μA steps; typically, plugins contain resistors from time slot signal lines to row/current lines.

Notes

[note 1] output from H plugins, input on V plugins

[note 2] output from V plugins, unused and terminated 50 Ω to ground in mainframe H slots

[note 3] not provided by most mainframes (digitizers only?). 7A16P connects B27 to A9, requires -5.2 V on A27.

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