7D02: Difference between revisions

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==Links==
==Links==


* [[Media:Tekscope 1980 V12 N4.pdf  |  Tekscope Vol. 12 No. 4, Dec 1980]]: Mike Reiney, ''A User-Programmable Logic Analyzer for Microprocessor Design''
* [http://www.barrytech.com/tektronix/tek7000/tek7d02.html 7D02 @ barrytech.com]
* [http://www.barrytech.com/tektronix/tek7000/tek7d02.html 7D02 @ barrytech.com]


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<gallery>
<gallery>
File:Tektronix_7D02.jpg      | 7D02 bare plugin
Tektronix_7D02.jpg      | 7D02 bare plugin
File:Tek7D02-frontPanel.jpg  | 7D02 front panel
Tek7D02-frontPanel.jpg  | 7D02 front panel
File:Tek7D02-top.jpg        | 7D02 top
Tek7D02-top.jpg        | 7D02 top
File:Tek-7d02.jpg            | 7D02 in mainframe with personality module in front
7603-7d02.jpg          | 7D02 in [[7603]] mainframe
Tek-7d02.jpg            | 7D02 in mainframe with personality module in front
</gallery>
</gallery>


[[Category:7000 series special-function plugins]]
[[Category:7000 series special-function plugins]]
[[Category:Logic Analyzers]]
[[Category:Logic Analyzers]]

Revision as of 01:13, 1 February 2017

Template:Plugin Sidebar 2 The Tektronix 7D02 is a programmable logic analyzer plug-in for the 7000-series scopes.

It connects to a target microprocessor system through a target module:

  • PM-101 - General Purpose Logic Analysis
  • PM-102 - 6800
  • PM-103 - 6802
  • PM-104 - 8085
  • PM-105 - Z-80
  • PM-106 - 8086
  • PM-107 - 8088
  • PM-108 - Z8002
  • PM-109 - 68000
  • PM-110 - Z8001
  • PM-111 - 6809

Key Specifications

Channels up to 52 - 28 (optionally 44) synchronous, 8 sync or async (timing option)
Memory 256 words
Timing option 8 channels, 255 word acquisition memory, 255 word glitch memory, 9 bit word recognizer; sampling 5 ms to 20 ns; P6451 logic probe
Sampling Rate up to 10 MHz
please add

Links

Pictures