The Tektronix P7001 is a digitizer, processor, and memory for the 7704A oscilloscope.
The design of the P7001 assumes it will be part of a 7704A system, and that the 7704A will be displaying a steady trace. The vertical and horizonal plug-ins control the beam as they would in any 7000-series scope.
The P7001 periodically samples the horizontal and vertical signals simultaneously as they pass from the plug-ins to the vertical and horizontal amplifiers. This allows it to fill its memory with data points represented as coordinate pairs, (x1,y1), (x2,y2), (x3,y3), etc. It is not necessary that x2 be greater than x1, i.e. the samples can be taken out-of-order with respect to their equivalent time in the waveform.
|Resolution||10 bit (V), 9 bit (H)|
|Memory||four waveforms, 512 samples each (4K × 10 bit core, or multiple 1k × 10 bit or 2k × 10 bit RAM boards)|
|Sampling rate||150 kHz ±30 kHz|
|External interface||16 bit parallel, proprietary "CP bus" (dual 37-pin Sub-D connectors) interfacing with Tektronix CP-1100 or CP-4100 series controllers|
- Tektronix P7001 Manuals (PDF)
- Tektronix P7001 Checkout Software Manual (PDF)
- Tektronix P7001 IEEE 488 Interface Manual, 1978 (OCR, PDF)
- Tektronix P7001 IEEE 488 Interface Manual, 1986 Revision (OCR, PDF)
- Tektronix P7001 ADC Interim Manual (PDF)
The signal coming from the acquisition unit enters a fast four-diode sample and hold circuit where it is sampled at 150 ksamples/sec. Each sample is digitized using a successive-approximation scheme. The analog to digital converter is made of several chips: a digital to analog converter, a comparator, and control logic.
The P7001 has its own power supply built into it, independent of the power supply in the acquisition unit of the 7704A. It has a backplane with an asynchronous bus and several cards that plug into that bus: sampler, analog to digital converter, memory, external digital interface, and display electronics. The P7001 was available with semiconductor memory or with magnetic core memory. Both types of memory were available through the whole production time of the P7001. In the first years the core memory module was cheaper and the default module. In later years the semiconductor memory module got cheaper and then this module was the default one. But the core memory module has one big adavantage: The memory content was preserved during a shutdown of the unit. This may have been the reason the core memory option remained available in the later years of P7001 production.
The bus is used for low speed signals. High speed signals are sent through coaxial cables that connect to the cards using Peltola connectors.
The Acquisition Unit of the 7704A, the P7001 Processor, and the Display Unit of the 7704A are connected by the Acquisition-Processor-Display (APD) Interface shown below.
P7001 in 7704A
Sample and Hold Card
Controller and memory
ADC and Display
Hardware signal Averager (HSA)