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7D15: Difference between revisions
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The '''Tektronix 7D15''' is a 225 MHz frequency counter plug-in for [[7000-series scopes]]. It is optimized for timing measurements, having a 100 MHz oscillator and interval measurement averaging capability. It has two inputs and can measure frequency, period or time difference. The 7D15 was introduced in November 1972. | The '''Tektronix 7D15''' is a 225 MHz frequency counter plug-in for [[7000-series scopes]]. It is optimized for timing measurements, having a 100 MHz oscillator and interval measurement averaging capability. It has two inputs and can measure frequency, period or time difference. The 7D15 was introduced in November 1972. | ||
The front panel uses [[SMB connector]]s for arming, clock in/out and reset signals. | The front panel uses [[SMB connector]]s for arming, clock in/out and reset signals. The arming input for channel A is active-high whereas that for channel B is active-low. When one or both are connected to the scope's delayed gate output, the delayed timebase can be used to select the part of the signal to be counted, e.g. for burst or A-B interval measurements. With this connection, the arming interval is directly visible as the intensified trace in the "A intensified by B" display mode. | ||
When installed in a horizontal plug-in bay, the 7D15 can use the mainframe's trigger signal as its input. In a vertical bay, it can display the gate signal. In "true gate" mode, this is the actual counter gate, however, this has a low repeat rate due to the counter's dead time. The "pseudo gate" mode improves this by showing the gate whenever the arming and trigger conditions are met, whether the counter is active or not. A third mode shows channel B's gate. The gate display signal is also available on a dedicated BNC output that can be routed to a scope input when the 7D15 is installed in a H slot. | |||
{{BeginSpecs}} | {{BeginSpecs}} | ||
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==Internals== | ==Internals== | ||
The 7D15 uses a number of Tek-made custom chips. The [[155-0086-00]], [[155-0087-00]] and [[155-0088-00]] legend generators are specific to this plug-in. The [[155-0090-00]] or [[155-0171-00]] four decade counter/latch/DAC chips implement the lower six counter digits. For the topmost two digits, the 7D15 employs ECL counters. ECL logic requires a | The 7D15 uses a number of Tek-made custom chips. The [[155-0086-00]], [[155-0087-00]] and [[155-0088-00]] legend generators are specific to this plug-in. The [[155-0090-00]] or [[155-0171-00]] four decade counter/latch/DAC chips implement the lower six counter digits. For the topmost two digits, the 7D15 employs ECL counters. ECL logic requires a −5 V supply, which a switching regulator (board A8) generates from the −15 V rail. | ||
The 5 MHz signal from the (non-ovenized) internal reference crystal oscillator is divided down to a 1 MHz master clock. Optionally, the 1 MHz can be supplied externally as well. An internal VCO, phase-locked to the 1 MHz master, produces a 100 MHz input to the counter chain for timing measurements. | The 5 MHz signal from the (non-ovenized) internal reference crystal oscillator is divided down to a 1 MHz master clock. Optionally, the 1 MHz can be supplied externally as well. An internal VCO, phase-locked to the 1 MHz master, produces a 100 MHz input to the counter chain for timing measurements. | ||