11401: Difference between revisions
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The outputs of the sampling gates are multiplexed by a channel switch into an ADC. | The outputs of the sampling gates are multiplexed by a channel switch into an ADC. | ||
A two-stage pipelined ADC (Tek part number [[155-0289-01]]) is used, with five bits per stage. | |||
Each stage has a bank of 32 comparators. | |||
The output of the ADC is stored in RAM. | The output of the ADC is stored in RAM. | ||
The contents of the RAM may have many points depending on the size of the acquisition window. | The contents of the RAM may have many points depending on the size of the acquisition window. | ||