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| Line 32: |
Line 32: |
| {{Spec | X-Y operation | X from center plugin, bandwidth 3 MHz<br />X-Y phase difference <1° to 1 MHz, <3° to 2 MHz }} | | {{Spec | X-Y operation | X from center plugin, bandwidth 3 MHz<br />X-Y phase difference <1° to 1 MHz, <3° to 2 MHz }} |
| {{EndSpecs}} | | {{EndSpecs}} |
|
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| ==Internals Common to the 11301 and 11302 ==
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| In this section, "11300" refers to the 11301 and 11302.
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|
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| The 11300 is a digitally controlled analog oscilloscope.
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| Like a typical analog scope, the 11300 has vertical amplifiers, a trigger circuit,
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| a timebase/sweep, a horizontal amplifier, and a CRT.
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| Unlike traditional analog scopes,
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| an 11300 system contains contains a significant amount of digital circuitry,
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| including multiple microprocessors, one in the mainframe and at least one in each plug-in.
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| The digital circuitry provides several externally-observable features:
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| * self-test and diagnosis
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| * self-calibration
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| * remote control via RS-232 or GPIB
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| * on-screen menu-based touch screen user interface
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|
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| Digital circuitry also implements some features that were traditionally implemented with analog circuitry,
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| e.g., the trigger holdoff is implemented with a counter instead of with a multivibrator.
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|
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| There are many DAC-generated analog control voltages in the 11300.
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| These are produced by the [[ACVS|Analog Control Voltage System]].
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|
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| The left and center plug-in can be used as the vertical axis and/or the trigger signal.
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| The right plug-in can used as the horizontal axis and/or the trigger signal.
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|
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| The RS-232 interface of the 11301 is implemented using an 8251A UART chip,
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| interfaced using an MC1488 line drive and an MC1489 line receiver.
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|
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| The mainframe communicates with the plug-ins via the [[SDI|Serial Data Interface (SDI)]],
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| which is part of the [[11000_Series_plug-in_interface|11000-series plug-in interface]].
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|
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| The 11300 performs a variety of self-checks and self-calibration.
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| Some of the self-checks are digital in nature, e.g., testing RAM by writing
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| a pattern, reading it back, and comparing what was read with what was written.
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| Other tests are analog in nature.
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| For the analog tests, there is an analog bus, ABUS,
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| that allows various voltages throughout the scope
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| to be measured by the test routine.
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| The ABUS is a fan-in tree formed by 74HC4051 analog multiplexers.
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| One level of multiplexing happens at the module level.
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| The ABUS signals from each of the modules are brought to the main ABUS multiplexer
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| (lower left corner of schematic drawing 12, Partial A11 Main Processor Board).
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| The output of the main ABUS multiplexer is fed to an LF398 sample and hold IC,
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| the output of which is fed to an AD574 12-bit successive approximation analog to digital converter.
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|
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| The 11300 has a GPIB interface implemented using a TMS9914A GPIB controller IC.
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|
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| The 11300 uses a TMS4500A DRAM controller to manage a bank of 41464 DRAM chips.
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|
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| The main CPU in the 11300 mainframe is an Intel 80186.
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| Program memory for the 80186, i.e., firmware, is stored on eight 27512 EPROMs.
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| Four of the EPROMs contain the lower bytes and the other four EPROMs contain the upper bytes.
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| This is shown on schematic figure 9, Kernel.
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|
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| The 11300 has a real-time clock powered by a 3V lithium battery.
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| The real-time clock is a [[Media:Msm6242b.pdf|6242 IC]].
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|
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| The A sweep and B sweep are each generated by [[155-0240-00]] ICs.
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|
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| The vertical amplifier in 11300 mainframes is U520,
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| an H2053 hybrid with part number [[165-2053-00]].
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|
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| Full calibration of an 11301 requires the use of the [[TEKCATS]] software.
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|
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| Calibration constants are stored in an Intel [[D2817A]] EEPROM.
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|
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| The 11300 scopes have a counter/timer IC, Tektronix part number 230-0022-50.
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| The die is M229.
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|
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|
| ==Pictures== | | ==Pictures== |