P7001: Difference between revisions

===Asynchronus Bus===

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To provide maximum flexibility all P7001 circuit cards are connected over an 16 bit asynchronous bus with 13 address lines. The bus is mostly implemented as etched lines on the Main Interface Board. High speed signals are sent through coaxial cables that connect to the cards using [[Peltola connector]]s. A serially connected line, or daisy chain, in the bus establishes device priority. This signal is called "Data Channel Grant Line". Each card has a specific location in the DPO. The position determines the priority that each card has in the use of the address and data buses. Unused slots must be fitted with a jumper card to close the daisy chain. Most of the card-specific signals are routed over [[Harmonica connector|Harmonica connectors]]. This enables the possibility to be able to swap around cards or to change the order of signal processing. This was done, for example, to give the HSA card access to the lights in the front panel.

===Front Panel & Z-Axis boards===

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P7001 z-axis front panel.jpg|Z Axis & Front panel board - with [[WP1000AF|Mod 515]]

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===Memory===

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Several types of memory configurations were available: 1k, 2k, 3k or 4k semiconductor memory and also 4k non-volatile core memory. All configurations were available through the whole lifecycle of the P7001. The memory serves to store the acquired waveforms and their associated scale factors. It also stores the computer output for display. Depending on the configuration the following storing capabilities are available:

===Readout Interface===

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There are two readout devices in the DPO. One is the readout board in the acquisition unit of the 7704A and the other is the readout interface card in the P7001. In the modes "PLUG-INS" or "STORE" all readout information displayed on the CRT come directly from the plugins. In "STORE" mode the readout interface digitizes these informations, converts them to ASCII-data and stores it in memory. In the modes "BOTH" or "MEMORY" the readout interface converts the ASCII data back to readout information and displays them on the CRT.

===Display Generator===

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The Display Generator card generates the CRT display of either real-time computer output (XY mode) or data stored in the processors memory (XT mode). Any combination of the stored and acquired waveforms may be displayed simultaneously. Also, since the display generator operates independent of other devices, changing data may be viewed during a store operation. The Display Generator card has a set of jumpers which switch the CRT output between vector and dot display.

===A/D Converter===

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The A/D Converter uses a successive approximation technique to digitize the vertical and horizontal samples. The vertical resolution is 10 bits, the horizontal resolution 9 bits. It is worth mentioning that the vertical part of the signal is digitized in a range of 10 divisions. As a result, even signal components that are slightly above or below the screen edge are captured. A two bit memory location code (A, B, C or D) is added to the converted horizontal data. The result is the direct memory address at which the vertical data is stored to. For sweeps slower or equal to 500 μs/Div all 512 waveform points are digitized in one sweep. For faster sweep speeds the samples will be taken out-of-order with respect to their equivalent time in the waveform. In this case subsequent sweeps are needed complete the digitized data. The computer has direct access to the register of the A/D converter and may at any time read the last vertical sample. This makes it possible to create arrays with more than 512 elements.

===External Interfaces===

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The external interface card provides a bilateral link between the P7001 and an external controller. The controller has full access to all programmable functions in the Processor, and the P7001, in turn, may interrupt the controller at any time. During the production time of the P7001, the following interfaces were gradually developed:

===Power Supply===

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The power supply in the P7001 is a reduced version of the power supply in the 7704A. Both power supplies are connected together using a relay in a master-slave configuration.

Tek_P7001_B010101.JPG|First P7001 (B010101) running the pulse parameter analysis program

Tek 7704a p7001 2.jpg|P7001 in 7704A. The Mainframe contains [[WP1000AF|Mod 515C]]

Tek_p7001_purple.jpg|P7001 with purple decals

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