7D01: Difference between revisions

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(Added link to local copy of 070-2206-00 instruction manual)
(Added link to operators manual)
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series=[[7000-series scopes]]|
series=[[7000-series scopes]]|
manuals=
manuals=
* [[Media:070-2205-02.pdf|7D01 Operators Manual (OCR, PDF)]]
* [[Media:070-2206-00.pdf|7D01 Instruction Manual, part no 070-2206-00 (OCR, PDF)]]
* [[Media:070-2206-00.pdf|7D01 Instruction Manual, part no 070-2206-00 (OCR, PDF)]]
* [http://w140.com/smb/7d01_sm.pdf 7D01 Instruction Manual, part no 070-2206-02 (OCR, PDF)]
* [http://w140.com/smb/7d01_sm.pdf 7D01 Instruction Manual, part no 070-2206-02 (OCR, PDF)]

Revision as of 06:32, 25 September 2020

Template:Plugin Sidebar 2 The Tektronix 7D01 is a logic analyzer plug-in for the 7000-series scopes. Compatible extension modules include the DF1 and DF2 display formatters and the DL2 or DL502 latch (glitch detector). The 7D01 takes two P6451 8+1 channel probes. The 7D01 does not contain a microprocessor and is built entirely from off-the-shelf logic ICs.

Key Specifications

Channels
  • 4 channels at 1016 bits/channel, maximum external clock period 10 ns (100 MHz)
  • 8 channels at 508 bits/channel, maximum external clock period 20 ns (50 MHz)
  • 16 channels at 254 bits/channel, maximum external clock period 40 ns (25 MHz)
Sampling Rate 10 ns to 5 ms per sample (1—2—5) or external clock up to 50 MHz
Trigger Sources
  • external
  • channel 0 data
  • 16 channel word recognizer
  • manual

Notes

Note about external clock rates (from Jim Mauck):

When I was a Tek Service Technician I worked on the 7D01. For several years I tested every 7D01 I worked on (and that was a lot of them) with a 100 MHz external clock in 16 channel mode. I would use a DF2 and set it to reacquire continuously as long as the 7D01 memory was the same as the original data I stored into the DF2 memory. The analyzer would run for hours without error. The funny part is that it wasn't until I had been doing this for several years that I realized it wasn't specified to run at that frequency. I continued to test them that way even after I discovered my error. However the instrument exceeding the specifications might be due to the data source providing a generous setup and hold time relative to the active clock edge.

Links

Pictures