Motorola 68020

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The Motorola 68020 is a 32-bit microprocessor based on the Motorola 68000 architecture, introduced in 1984.

Unlike the earlier 68000-family CPUs, the 68020 has 32-bit internal and external data and address buses and a 32-bit ALU. It was produced with clock speed ratings from 12 MHz to 33 MHz.

Compared to the predecessors, the 68020 adds extra instructions and additional addressing modes, pipelining, a 256-byte direct-mapped instruction cache, and support for non-aligned memory accesses. It also features an asynchronous coprocessor interface supporting up to eight coprocessors, such as floating point units (MC68881 or MC68882) or a paged memory management unit (MC68851).

The lower-cost 68EC020 version has a 24-bit external address bus.


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