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P7001: Difference between revisions
Added pics of core memory module and test of alternative layout
(added short description of the front panel and z-axis cards) |
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===Memory=== | ===Memory=== | ||
<gallery> | |||
Tek_P7001_CoreMem_DataRegister.jpg | |||
Tek_P7001_CoreMem_controller.jpg | |||
P7001 CORE DETAIL01.JPG | |||
P7001 2k memory.jpg | |||
</gallery> | |||
Several types of memory configurations were available: 1k, 2k, 3k or 4k semiconductor memory and also 4k non-volatile core memory. All configurations were available through the whole lifecycle of the P7001. The memory serves to store the acquired waveforms and their associated scale factors. It also stores the computer output for display. Depending on the configuration the following storing capabilites are available: | Several types of memory configurations were available: 1k, 2k, 3k or 4k semiconductor memory and also 4k non-volatile core memory. All configurations were available through the whole lifecycle of the P7001. The memory serves to store the acquired waveforms and their associated scale factors. It also stores the computer output for display. Depending on the configuration the following storing capabilites are available: | ||
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===Readout Interface=== | ===Readout Interface=== | ||
<gallery> | |||
P7001 readout interface.jpg | |||
</gallery> | |||
There are two readout devices in the DPO. One is the readout board in the acquisition unit of the 7704A and the other is the readout interface card in the P7001. In the modes "PLUG-INS" or "STORE" all readout information displayed on the CRT come directly from the plugins. In "STORE" mode the readout interface digitizes these information, converts them to ASCII-data and stores it in memory. In the modes "BOTH" or "MEMORY" the readout interface converts the ASCII data back to readout information and displays them on the CRT. | There are two readout devices in the DPO. One is the readout board in the acquisition unit of the 7704A and the other is the readout interface card in the P7001. In the modes "PLUG-INS" or "STORE" all readout information displayed on the CRT come directly from the plugins. In "STORE" mode the readout interface digitizes these information, converts them to ASCII-data and stores it in memory. In the modes "BOTH" or "MEMORY" the readout interface converts the ASCII data back to readout information and displays them on the CRT. | ||
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===Hardware Signal Averager=== | ===Hardware Signal Averager=== | ||
<gallery> | |||
P7001 HSA timing.jpg | |||
P7001 HSA memory.jpg | |||
</gallery> | |||
For DPOs which are connected via the fast CP bus, it is no problem to transfer several data sets over the interface and then have the computer calculate the averaged waveform. But with the relatively slow interfaces like GPIB this procedure is impractical. The optional HSA card solves this problem by locally computing the averaged waveform of up to 4096 single waveforms. The HSA card also has the ability to calculate the histogram of a waveform. The histogram will be displayed horizontally at the lower third of the CRT. | For DPOs which are connected via the fast CP bus, it is no problem to transfer several data sets over the interface and then have the computer calculate the averaged waveform. But with the relatively slow interfaces like GPIB this procedure is impractical. The optional HSA card solves this problem by locally computing the averaged waveform of up to 4096 single waveforms. The HSA card also has the ability to calculate the histogram of a waveform. The histogram will be displayed horizontally at the lower third of the CRT. | ||
===External Interfaces=== | ===External Interfaces=== | ||
<gallery> | |||
P7001 dpo controller board.jpg | |||
P7001 GPIB adaper left dismounted.jpg | |||
P7001 GPIB adaper right dismounted.jpg | |||
</gallery> | |||
The external interface card provides a bilateral link between the P7001 and an external controller. The controller has full access to all programmable functions in the Processor, and the P7001, in turn, may interrupt the controller at any time. During the production time of the P7001, the following interfaces were gradually developed: | The external interface card provides a bilateral link between the P7001 and an external controller. The controller has full access to all programmable functions in the Processor, and the P7001, in turn, may interrupt the controller at any time. During the production time of the P7001, the following interfaces were gradually developed: | ||
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'''Core Memory (optional)''' | '''Core Memory (optional)''' | ||
<gallery> | <gallery> | ||
Tek_P7001_CoreMem_DataRegister.jpg|Memory data register board | |||
Tek_P7001_CoreMem_controller.jpg|Controller & Address Drivers | |||
P7001 diode decoder.jpg|Address decoder | P7001 diode decoder.jpg|Address decoder | ||
P7001 core boards.jpg|Core boards | P7001 core boards.jpg|Core boards | ||