SI5010: Difference between revisions
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{{TM5000 | mfg= Tektronix | type=SI5010 | class=switching | function=GPIB-controllable 50 Ω BNC switch matrix | | |||
image=Tek si5010 front.jpg | introduced=1982 | discontinued=(?) | | |||
designers= |manuals= | |||
* [[Media:070-3721-00.pdf|Tektronix SI5010 Manual]] | |||
* [[Media:070-4615-00.pdf|Instrument Interfacing Guide]] | |||
* [ | {{ROM Images}} | ||
* A15U1011: [[Media:160-1482-00.bin|160-1482-00]] | |||
* A20U1103: [[Media:160-1483-00.bin|160-1483-00]] | |||
* A20U1200: [[Media:160-1484-01.bin|160-1484-01]] | |||
}} It can only be controlled via GPIB − the front panel only provides an "Inst ID" button whose function is also software controlled. | |||
==Specifications== | |||
The −3 dB frequency is 350 MHz for transmission through the switch. | |||
The isolation between channels is 40 dB at 100 MHz. | |||
Switching is performed using relays, not semiconductor switches. | |||
* Software Reconfigurable as: | |||
** 16 Channel to 1 | |||
** dual 8 Channel to 1 | |||
** quad 4 Channel to1 | |||
* Buffered mode for unattended (controllerless) operation | |||
* Real time clock | |||
* Triggered events | |||
==Internals== | |||
The SI5010 shares the GPIB/CPU board A20 (670-7199-00) with the [[MI5010]]. | |||
==Pictures== | |||
<gallery> | <gallery> | ||
Tek si5010 front.jpg|SI 5010 | |||
Tek si5010 left internal.jpg|SI 5010 Left Internal | |||
Tek si5010 right internal.jpg|SI 5010 Right Internal | |||
Tek si5010 rear.jpg|SI 5010 rear | |||
</gallery> | </gallery> | ||
Revision as of 06:54, 4 April 2022
The Tektronix SI5010 is a GPIB-controllable 50 Ω BNC switch matrix plug-in for the TM5000 system. It can only be controlled via GPIB − the front panel only provides an "Inst ID" button whose function is also software controlled.
Specifications
The −3 dB frequency is 350 MHz for transmission through the switch. The isolation between channels is 40 dB at 100 MHz. Switching is performed using relays, not semiconductor switches.
- Software Reconfigurable as:
- 16 Channel to 1
- dual 8 Channel to 1
- quad 4 Channel to1
- Buffered mode for unattended (controllerless) operation
- Real time clock
- Triggered events
Internals
The SI5010 shares the GPIB/CPU board A20 (670-7199-00) with the MI5010.
Pictures
-
SI 5010
-
SI 5010 Left Internal
-
SI 5010 Right Internal
-
SI 5010 rear
