SG5030: Difference between revisions

(Added Firmware files)
No edit summary
 
(3 intermediate revisions by 2 users not shown)
Line 3: Line 3:
designers= |
designers= |
manuals=
manuals=
* [[Media:070-7705-01.pdf|SG5030 User Manual 070-7705-01]]
* [[Media:070-7703-01.pdf|SG5030 Service Manual 070-7703-01]]
* [[Media:070-7703-01.pdf|SG5030 Service Manual 070-7703-01]]
* [[Media:070-7704-00.pdf|SG5030 Instrument Interfacing Guide 070-7704-00]]
* [[Media:070-7704-00.pdf|SG5030 Interfacing Guide 070-7704-00]]
* [[Media:070-7705-01.pdf|SG5030 User Manual 070-7705-01]]
* [[Media:070-7706-00.pdf|SG5030 Reference Card 070-7706-00]]
* [[Media:SG5030-991PG.pdf|SG5030 Sales Brochure]]
* [[Media:SG5030-991PG.pdf|SG5030 Sales Brochure]]
{{ROM Images}}
* A3U2051: [[Media:160-6447-02.bin|160-6447-02]] (27512)
* A3U3050: [[Media:160-6448-02.bin|160-6448-02]] (27512)
}}
}}
The SG5030 occupies three plugin bays in a TM5000 mainframe.  
The SG5030 occupies three plugin bays in a TM5000 mainframe.  
It requires the [[015-2350-01|015-2350-01 Leveling Head]] for operation.
It requires the [[015-2350-01|015-2350-01 Leveling Head]] for operation.
Each leveling head is matched/calibrated to a specific instrument.
 
Each leveling head is matched/calibrated to a specific instrument. A replacement head can only be used after readjusting the instrument to that specific head.


{{BeginSpecs}}
{{BeginSpecs}}
{{Spec | Frequency range | 0.1 Hz to 550 MHz }}
{{Spec | Frequency | 0.1 Hz to 550 MHz }}
{{Spec | Amplitude | 4.5 mV to 5.5 V }}
{{Spec | Amplitude | 4.5 mV to 5.5 V }}
{{EndSpecs}}
{{EndSpecs}}
==Firmware==
* [[Media:160-6447-01.zip|SG5030 A3U2051 EPROM 160-6447-01 Binary]] (ZIP)
* [[Media:160-6448-01.zip|SG5030 A3U3050 EPROM 160-6448-01 Binary]] (ZIP)


==Pictures==
==Pictures==
Line 40: Line 41:
015-2350-01_10.jpg  
015-2350-01_10.jpg  
</gallery>
</gallery>
==Components==
{{Parts|SG5030}}
The core of the low-frequency (<50 kHz) generation circuit is a DRFS-3250 DDS oscillator (24-bit phase accumulator) chip made by [http://wirelessandhighspeed.com/digital-rf-solutions/ Digital RF Solutions] with two external 2kx8 sine ROMs feeding a 12-bit, 20 MHz DAC (TRW TDC1012).  This DDS is also used for fine frequency control at RF.
The ooutput amplifier contains a Tek-made hybrid amplifier (A7H3070, [[165-2351-00]]).

Latest revision as of 09:57, 1 November 2023

The Tektronix SG5030 is a leveled sinewave generator plug-in for the TM5000 system. The SG5030 occupies three plugin bays in a TM5000 mainframe. It requires the 015-2350-01 Leveling Head for operation.

Tektronix SG5030
leveled sinewave generator
Tektronix SG5030

Produced from 1991 to (?)

Manuals
ROM Images
File Pos. Checksum
(All manuals in PDF format unless noted otherwise)

Each leveling head is matched/calibrated to a specific instrument. A replacement head can only be used after readjusting the instrument to that specific head.

Key Specifications

Frequency 0.1 Hz to 550 MHz
Amplitude 4.5 mV to 5.5 V

Pictures

Components

Some Parts Used in the SG5030

Part Part Number(s) Class Description Used in
148-0128-00 148-0128-00 Discrete component miniature magnetic latching relay armature DC5009 SG5030
Motorola 68000 156-1445-00 Monolithic integrated circuit 16-bit microprocessor 4041 RTD710 SG5030
TMS9914 156-1444-00 156-1444-01 Monolithic integrated circuit GPIB controller 2221 2230 2424L 2440 4052A 4054A 021-0374-00 067-1137-99 DC5009 DC5010 DM5010 DM5120 DM5520 MI5010 SG5010 SG5030 SI5010 PS5004 PS5010 Keithley 195A Keithley 197 Keithley 199 Keithley 220 Keithley 230

The core of the low-frequency (<50 kHz) generation circuit is a DRFS-3250 DDS oscillator (24-bit phase accumulator) chip made by Digital RF Solutions with two external 2kx8 sine ROMs feeding a 12-bit, 20 MHz DAC (TRW TDC1012). This DDS is also used for fine frequency control at RF.

The ooutput amplifier contains a Tek-made hybrid amplifier (A7H3070, 165-2351-00).