Patent US 4477310A
Jump to navigation
Jump to search
| Patent number | US 4477310A (click link for details and documents via Google Patents) |
|---|---|
| Title | Process for manufacturing MOS integrated circuit with improved method of forming refractory metal silicide areas |
| Inventors | Hee K. Park, Tadanori Yamaguchi |
| Company | Tektronix Inc |
| Filing date | 1983-08-12 |
| Grant date | 1984-10-16 |