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6R1A: Difference between revisions
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to pin 7 of the 0% zone card. On the 0% zone card, the sweep signal is buffered by | to pin 7 of the 0% zone card. On the 0% zone card, the sweep signal is buffered by | ||
V43, a Nuvistor cathode-follower, and the buffered sweep signal is sent out from | V43, a Nuvistor cathode-follower, and the buffered sweep signal is sent out from | ||
pin 10 of the 0% zone card. | pin 10 of the 0% zone card. The primary purpose if the 0% zone circuit is to produce | ||
a fixed voltage, putting D43, a 2mA tunnel diode, into the high voltage state whenever | a signal that instructs the memory circuits to sample and hold the voltages at their | ||
the sweep signal is above about 5 V. | inputs during the first cm of the sweep. To accomplish this, the 0% zone card | ||
complete sweep, | compares the sweep voltage with a fixed voltage, putting D43, a 2mA tunnel diode, | ||
into the high voltage state whenever the sweep signal is above about 5 V. | |||
Since the sweep signal goes from 0 V to 50 V for a complete sweep, 5V corresponds to a | |||
point 1 major division from the left edge of the display. The +GATE signal goes | |||
high at the beginning of each sweep and returns low at the end of each sweep. The | |||
+0% OUT signal is high only during the first cm of the sweep. The logic is +GATE AND NOT | |||
(SWEEP > 5V). When the sweep starts, Q23 pulls the top leg of R54 high, and since | |||
Q54 is off at the point, the voltage on the bottom leg of R54 also rises, raising the | |||
voltage at the base of buffer transistor Q63, which raises the +0% output. When the | |||
sweep voltage reaches 5V and the Q54 turns on, the voltage on the bottom leg of R54 | |||
drops to near 0 V. The buffer Q63 follows, and the +0% output falls. The -0% output signal | |||
is the logical complement of the +0% signal, generated by common-emitter inverter | |||
Q64. | |||
basic | |||
When | |||