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7D01: Difference between revisions
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Image:Tek_7D01_Front.jpg | 7D01 Front | Image:Tek_7D01_Front.jpg | 7D01 Front | ||
image:Tek_7D01_timing.jpg | 7D01 Timing Diagram | image:Tek_7D01_timing.jpg | 7D01 Timing Diagram | ||
image:Tek_7D01-DF01_timing.jpg | 7D01 + [[ | image:Tek_7D01-DF01_timing.jpg | 7D01 + [[DF1]] Timing Diagram | ||
image:Tek_7D01-DF01_table.jpg | 7D01 + [[DF1]] State Table | |||
image:Tek_7D01_Left.jpg | 7D01 Left | |||
image:Tek_7D01_Right.jpg | 7D01 Right | |||
image:Tek_7D01_Bottom.jpg | 7D01 Bottom | |||
image:Tek_7D01_rear.jpg | 7D01 Rear (back plate removed) | |||
image:Tek_7D01_Cursor.jpg | 7D01 Cursor Board | |||
image:Tek_7D01_Memory.jpg | 7D01 Memory Board | |||
</gallery> | </gallery> | ||
[[Category:7000 series special-function plugins]] | [[Category:7000 series special-function plugins]] | ||
[[Category:Logic Analyzers]] | [[Category:Logic Analyzers]] | ||