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The high-impedance input stage is a dual-JFET where transistor A operates as a source-follower | The high-impedance input stage is a dual-JFET where transistor A operates as a source-follower | ||
and transistor B operates as a current source biased with Vgs=0, maintaining a constant | and transistor B operates as a current source biased with Vgs=0, maintaining a constant | ||
current through transistor A, independent of input signal voltage. | current through transistor A, independent of input signal voltage. After the FET input stage, | ||
the signal is fed to a Sziklai pair formed of a PNP transistor first, driving an NPN output | |||
transistor. The Sziklai pair is non-inverting and has a voltage gain | |||
greater than unity, which allows the overall gain of the 282 to be trimmed for exactly unity | |||
gain. | |||
The risetime is 3ns when driven from a 25-ohm source. | The risetime is 3ns when driven from a 25-ohm source. | ||