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The output from the DAC is sampled and held, and the buffered voltages are fed to the rest of the plug-in. | The output from the DAC is sampled and held, and the buffered voltages are fed to the rest of the plug-in. | ||
The voltages in the sample and hold are periodically refreshed. | The voltages in the sample and hold are periodically refreshed. | ||
The sample and hold and output buffers are on a daughterboard. (See photo below) | |||
The ACVS is controlled by the [[M382]] chip, which also implements [[SDI]] and sequences the amplifier output enable signals. | The ACVS is controlled by the [[M382]] chip, which also implements [[SDI]] and sequences the amplifier output enable signals. |