32,959
edits
ACVS: Difference between revisions
Jump to navigation
Jump to search
→ACVS in 11000-Series Mainframes
| Line 29: | Line 29: | ||
A refresh cycle sequentially refreshes the voltage on each of the sample-and-hold capacitors. | A refresh cycle sequentially refreshes the voltage on each of the sample-and-hold capacitors. | ||
The time to complete the entire refresh cycle is 900 μs. | The time to complete the entire refresh cycle is 900 μs. | ||
The precision is 12 bits for all but two of the analog outputs. | |||
On those two, the precisions is 14.6 bits. | |||
These high-precision outputs are formed by combining three 12-bit outputs using resistor summing networks. | |||