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6R1: Difference between revisions
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Each MEMORY card contains two sample and hold circuits. | Each MEMORY card contains two sample and hold circuits. | ||
The main purpose of the MEMORY card is to sample and hold its vertical signal during the | The main purpose of the MEMORY card is to sample and hold its vertical signal during the | ||
0% and 100% zones. One sampler on the MEMORY card captures | 0% and 100% zones. One sampler on the MEMORY card captures the signal voltage during the 0% zone. | ||
The other captures the signal voltage during the 100% zone. The input to | The other captures the signal voltage during the 100% zone. The input to | ||
both of | both of the samplers is the output signal of the vertical plug-in. Since this is a relatively | ||
slow-changing signal with a relatively long sampling time, each sampler circuit is simply a sampling gate | slow-changing signal with a relatively long sampling time, each sampler circuit is simply a sampling gate | ||
(also known as a transmission gate or analog switch) | (also known as a transmission gate or analog switch) | ||
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supply and splits approximately equally between the left diode path (D61 and D71) and the right | supply and splits approximately equally between the left diode path (D61 and D71) and the right | ||
diode path (D62 and D72). With both paths conducting, the bridge is "on" and the holding capacitor (C80) | diode path (D62 and D72). With both paths conducting, the bridge is "on" and the holding capacitor (C80) | ||
voltage converges to the vertical signal voltage. When the 0% zone card detects | voltage converges to the vertical signal voltage. When the 0% zone card detects that the sweep has | ||
left the 0% zone, the +0% zone signal goes to 0 V and the -0% zone signal goes to 20 V. This turns on | left the 0% zone, the +0% zone signal goes to 0 V and the -0% zone signal goes to 20 V. This turns on | ||
Q63 and Q73, which act as emitter-followers, lowering the voltage at the top of the sampling bridge | Q63 and Q73, which act as emitter-followers, lowering the voltage at the top of the sampling bridge | ||
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bridge. With D62 and D72 reverse-biased, current cannot flow through R80. Assuming that the grid | bridge. With D62 and D72 reverse-biased, current cannot flow through R80. Assuming that the grid | ||
current of V83 is zero, whatever charge is on the holding capacitor at the end of the sampling pulse | current of V83 is zero, whatever charge is on the holding capacitor at the end of the sampling pulse | ||
is trapped on | is trapped on the capacitor until the next sampling pulse. (V_cap = Q_cap / C). | ||
The 100% zone sample and hold circuit gets its sampling signals | The 100% zone sample and hold circuit gets its sampling signals | ||