Patent US 5122694A: Revision history

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26 June 2024

  • curprev 04:4004:40, 26 June 2024‎ Peter talk contribs‎ 426 bytes +426‎ Created page with "{{Patent |Office=US |Number=5122694A |Title=Method and electrical circuit for eliminating time jitter caused by metastable conditions in asynchronous logic circuits |Company=Tektronix Inc |Inventors=Jeffrey O. Bradford;Richard W. Spehn |Filing date=1990-12-26 |Grant date=1992-06-16 |Cites=Patent US 3725792A;Patent US 4495586A;Patent US 4499386A;Patent US 4797572A;Patent US 4888588A;Patent US 4982118A;Patent US 5017814A; }}"
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