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{{BeginSpecs}} | {{BeginSpecs}} | ||
{{Spec | Probes | [[P6451]] (8-channel) and [[P6107]] (trigger/serial) }} | {{Spec | Probes | [[P6451]] (8-channel) and [[P6107]] (trigger/serial) }} | ||
{{Spec | | {{Spec | Channels | 16 channels }} | ||
{{Spec|Glitch | {{Spec | Glitch detection | On Pod A and B (16 Channels)}} | ||
{{Spec|Minimum | {{Spec | Minimum logic swing |500 mV<sub>p-p</sub>}} | ||
{{Spec|Maximum | {{Spec | Maximum logic swing |–15 V to +10 V}} | ||
{{Spec|Maximum non-destructive | {{Spec | Maximum input |±40 V non-destructive}} | ||
{{Spec|Glitch | {{Spec | Glitch data width| 5 ns min}} | ||
{{Spec|Clock | {{Spec | Clock source | Internal or external}} | ||
{{Spec|Data | {{Spec | Data setup time | 13 ns min, 8 ns typ.}} | ||
{{Spec|Data | {{Spec | Data hold time | 0 ns}} | ||
{{Spec|Minimum | {{Spec | Minimum clock period | 20 ns}} | ||
{{Spec|Memory | {{Spec | Memory | | ||
* Reference Memory: 16 x 256 bits | * Reference Memory: 16 x 256 bits | ||
* Aquisition Memory: 16 x 256 bits | * Aquisition Memory: 16 x 256 bits | ||
* Glitch Memory: 16 x 256 bits | * Glitch Memory: 16 x 256 bits | ||
}} | }} | ||
{{Spec | Features | | {{Spec | Features | |