7D01: Difference between revisions
Jump to navigation
Jump to search
No edit summary |
No edit summary |
||
| Line 91: | Line 91: | ||
Tek_7D01_Cursor.jpg | 7D01 Cursor Board | Tek_7D01_Cursor.jpg | 7D01 Cursor Board | ||
Tek_7D01_Memory.jpg | 7D01 Memory Board | Tek_7D01_Memory.jpg | 7D01 Memory Board | ||
Tek_7D01_timing.jpg | 7D01 Timing Diagram | Tek_7D01_timing.jpg | Standalone 7D01 Timing Diagram (using mainframe readout) | ||
Tek_7D01-DF01_timing.jpg | 7D01 + [[DF1]] (or [[DF2]]) Timing Diagram | Tek_7D01-DF01_timing.jpg | 7D01 + [[DF1]] (or [[DF2]]) Timing Diagram | ||
Tek_7D01-DF01_table.jpg | 7D01 + [[DF1]] (or [[DF2]]) State Table | Tek_7D01-DF01_table.jpg | 7D01 + [[DF1]] (or [[DF2]]) State Table | ||