P6230: Difference between revisions

P6230 (view source)

Revision as of 14:42, 19 January 2024

6 bytes added , 19 January

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Peter

Bureaucrats, Interface administrators, Suppressors, Administrators

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@@ Line 27: / Line 27: @@
 {{Spec | Input Impedance | 450 Ω // 1.3 pF  (1.6 pF guaranteed) }}
 {{Spec | Signal delay    | 8.7 ± 0.1 ns    }}
-{{Spec | DC offset       | –5 V ≤ (V<sub>signal</sub> + V<sub>offset</sub>) ≤ +5 V }}
+{{Spec | DC offset       | −5 V ≤ (V<sub>signal</sub> + V<sub>offset</sub>) ≤ +5 V }}
 {{Spec | Features |
 * Readout Pin
@@ Line 42: / Line 42: @@
 </blockquote>
 <blockquote>
-ECL logic is most commonly operated from a -5.2 V supply with Vcc connected to ground. The output of an ECL gate is the emitter of an NPN emitter follower stage. The output is pulled down to a negative supply (about -2 V) with an external resistor (50 Ω to 100 Ω). Since speed is a major consideration in ECL designs, the interconnections between gates are often transmission lines, and the pull-down resistor doubles as a line termination.
+ECL logic is most commonly operated from a −5.2 V supply with Vcc connected to ground. The output of an ECL gate is the emitter of an NPN emitter follower stage. The output is pulled down to a negative supply (about −2 V) with an external resistor (50 Ω to 100 Ω). Since speed is a major consideration in ECL designs, the interconnections between gates are often transmission lines, and the pull-down resistor doubles as a line termination.
 </blockquote>
 <blockquote>
@@ Line 85: / Line 85: @@
 |align=right|  $799
 |-
-! In 2022 Dollars
+! In 2023 Dollars
 |align=right|  –
-|align=right|  $1,070
+|align=right|  $1,200
-|align=right|  $980
+|align=right|  $1,000
-|align=right|  $1,140
+|align=right|  $1,200
-|align=right|  $1,550
+|align=right|  $1,600
 |}