067-0587-02: Difference between revisions

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The clock is delayed, amplified and limited, then fed to a Schottky-diode based pulse shaper with L-C compensating networks. The output pulse has a rise time of max. 150 picoseconds with less than 2% aberrations.
The clock is delayed, amplified and limited, then fed to a Schottky-diode based pulse shaper with L-C compensating networks. The output pulse has a rise time of max. 150 picoseconds with less than 2% aberrations.


The staircase generator for Gain mode is implemented using a 4 bit count and multiplexer.  The 0-volt step (No. 6) is held for five counts, producing a brighter trace to allow easy alignment with the center of the screen.
The staircase generator for Gain mode is implemented using a 4 bit counter and multiplexer.  The 0-volt step (No. 6) is held for five counts, producing a brighter trace to allow easy alignment with the center of the screen.


For bandwidth measurements, there is a leveler circuit with a [[155-0183-00|differential diode detector]] controlling an amplifier's gain in an AGC loop.
For bandwidth measurements, there is a leveler circuit with a [[155-0183-00|differential diode detector]] controlling an amplifier's gain in an AGC loop.  '''NB:''' The response is not specified below 3 MHz.


The 067-0587-02 is based on a number of Tektronix custom ICs from the 1 GHz [[7104]] scope generation, such as the [[155-0160-00|155-0160-00 trigger amplifier + source select chip]] and the [[155-0175-00|155-0175-00 trigger amplifier chip]].
The 067-0587-02 is based on a number of Tektronix custom ICs from the 1 GHz [[7104]] scope generation, such as the [[155-0160-00|155-0160-00 trigger amplifier + source select chip]] and the [[155-0175-00|155-0175-00 trigger amplifier chip]].

Revision as of 07:57, 20 September 2018

Template:Plugin Sidebar 2 The Tektronix 067-0587-02 is a signal standardizer (calibration) plug-in for 7000-series scopes, especially the 1 GHz 7104 mainframe. It is a complete redesign of the 067-0587-01 standardizer. It provides a calibrated staircase at 1 line/Div in Gain mode, a fast-rising pulse in Step Resp mode, an input for a CW signal to test bandwidth, and an input for a common mode test signal. The 067-0587-02 was designed by Art Metz.

Key Specifications

     — GAIN mode
Staircase accuracy ± 0.3% in ± 3 Div, ± 0.5% in ± 4 Div, Linearity ± 0.2% of 10 Div
     — STEP RESP mode
Amplitude 2 to 10 Div
Position Top at least ±5 Div from center of screen
Rise time < 150 ps
Repetition rate 10 Hz to 1 MHz in decade steps, 0.1 %
Pretrig Out 0.5 V into 50 Ω, 55 to 95 ns lead time (internally variable)
     — FREQ RESP mode
Input impedance 50 Ω
Input range 0.5 to 1 Vp-p
Flatness ± 3% from 3 MHz to 1 GHz

Internals

Internal signals are derived from a 1 MHz oscillator with selectable decade divisions down to 10 Hz repetition.

The clock is delayed, amplified and limited, then fed to a Schottky-diode based pulse shaper with L-C compensating networks. The output pulse has a rise time of max. 150 picoseconds with less than 2% aberrations.

The staircase generator for Gain mode is implemented using a 4 bit counter and multiplexer. The 0-volt step (No. 6) is held for five counts, producing a brighter trace to allow easy alignment with the center of the screen.

For bandwidth measurements, there is a leveler circuit with a differential diode detector controlling an amplifier's gain in an AGC loop. NB: The response is not specified below 3 MHz.

The 067-0587-02 is based on a number of Tektronix custom ICs from the 1 GHz 7104 scope generation, such as the 155-0160-00 trigger amplifier + source select chip and the 155-0175-00 trigger amplifier chip.

The mode selector switch is a special elastomer-based cam switch. The manual warns that while it can be cleaned if proper procedure is followed (note some screws are labelled "do not remove" on the cover!), only at the factory can (could ...) it be repaired/re-assembled completely. A Tek-internal introduction to 7104 maintenance discusses this switch in detail.

Links

Pictures