P6442: Difference between revisions
Jump to navigation
Jump to search
No edit summary |
No edit summary |
||
| Line 3: | Line 3: | ||
It is a 16-channel data acquisition probe TTL threshold probe. The '''P6442''' has three external lines and one qualifier line. | It is a 16-channel data acquisition probe TTL threshold probe. The '''P6442''' has three external lines and one qualifier line. | ||
'''Note from operators manual:''' | |||
<blockquote> | |||
''You cannot mix P6442 probes with [[P6443]] or [[P6444]] probes to take an acquisition.<br />If you acquire data on P6442 probes at the same time you try to sample data on P6443/P6444 probes, the acquired data from the P6443/P6444 probes will be invalid.'' | |||
</blockquote> | |||
==Specifications== | ==Specifications== | ||
Revision as of 06:48, 22 March 2019
The Tektronix P6442 channel state/timing probe can be used with the 1230, 1225 and 1220 logic analyzers.
It is a 16-channel data acquisition probe TTL threshold probe. The P6442 has three external lines and one qualifier line.
Note from operators manual:
You cannot mix P6442 probes with P6443 or P6444 probes to take an acquisition.
If you acquire data on P6442 probes at the same time you try to sample data on P6443/P6444 probes, the acquired data from the P6443/P6444 probes will be invalid.
Specifications
The probe is composed solely of TTL level integrated circuits. The construction of the probe is made of two board stacked on top of each other.
The pin-out of the probe is given. (looking from the front)
| Notch | Notch | Notch | ||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| EXT | EXT | EXT | CLK | CLK | CLK | D14 | D12 | D10 | D8 | CLK | D6 | D4 | D2 | D0 | ||
| EXT | EXT | EXT | QUAL | QUAL | GND | D15 | D13 | D11 | D9 | GND | D7 | D5 | D3 | D1 | ||
