Texas Instruments TMS9900: Difference between revisions
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There is no stack and no stack pointer; instead, the TMS9900 has branch instructions that save the program counter to a register and change the register context. Register context switch is also used for interrupts. The processor can be paused with the address bus tri-stated for external direct memory access (DMA). | There is no stack and no stack pointer; instead, the TMS9900 has branch instructions that save the program counter to a register and change the register context. Register context switch is also used for interrupts. The processor can be paused with the address bus tri-stated for external direct memory access (DMA). | ||
The TMS9900 was implemented in an N-channel Si-gate MOS process and requires 5 V, −5 V and +12 V supplies | The TMS9900 was implemented in an N-channel Si-gate MOS process and requires 5 V, −5 V and +12 V supplies. It came packaged in a 64-pin, 0.9" wide DIP. | ||
Maximum clock frequency is 3 MHz, often generated from a 48 MHz oscillator using a TIM9904 (74LS362) clock generator, because the CPU requires four non-overlapping clock phases. The shortest instructions require eight clock cycles or 2.7 μs to complete. | Maximum clock frequency is 3 MHz, often generated from a 48 MHz oscillator using a TIM9904 (74LS362) clock generator, because the CPU requires four non-overlapping clock phases. The shortest instructions require eight clock cycles or 2.7 μs to complete. | ||
[[File:TMS9900 pinout.png|thumb|200px|right|Pinout (click to enlarge)]] | [[File:TMS9900 pinout.png|thumb|200px|right|Pinout (click to enlarge)]] |
Revision as of 02:55, 18 October 2020
The Texas Instruments TMS9900 is a 16-bit microprocessor introduced in 1976.
The architecture is purely 16-bit, with a 16-bit data bus and a 15-bit address bus for a 32kWords (64KBytes) capacity. Addresses refer to bytes with big-endian ordering convention (TI labeled the most significant address and data lines "A0" and "D0", respectively).
There are three internal 16-bit registers (program counter, status register, and workspace pointer). The latter points to a base address in external RAM where the processor's 16 general-purpose user registers (each 16 bits wide) are kept.
There is no stack and no stack pointer; instead, the TMS9900 has branch instructions that save the program counter to a register and change the register context. Register context switch is also used for interrupts. The processor can be paused with the address bus tri-stated for external direct memory access (DMA).
The TMS9900 was implemented in an N-channel Si-gate MOS process and requires 5 V, −5 V and +12 V supplies. It came packaged in a 64-pin, 0.9" wide DIP.
Maximum clock frequency is 3 MHz, often generated from a 48 MHz oscillator using a TIM9904 (74LS362) clock generator, because the CPU requires four non-overlapping clock phases. The shortest instructions require eight clock cycles or 2.7 μs to complete.
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