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SG503: Difference between revisions
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{{Spec | Harmonics | 2<sup>nd</sup> harmonic ≥35 dB down from fundamental, 3<sup>rd</sup> and higher harmonics ≥40 dB down }} | {{Spec | Harmonics | 2<sup>nd</sup> harmonic ≥35 dB down from fundamental, 3<sup>rd</sup> and higher harmonics ≥40 dB down }} | ||
{{EndSpecs}} | {{EndSpecs}} | ||
==Rear interface== | |||
The sine output, remote amplitude control input, and a 12-bit BCD version of the counter value are available via the rear connector. | |||
==Internals== | |||
The SG503 uses two LC Hartley oscillators, one for 100 MHz and above with an air-core inductor, the other for the lower ranges using switched ferrite-core inductors. Tuning is via a traditional three-section variable capacitor. After filtering, a regulated power amplifier stage (caution: beryllium oxide in transistor cases!) is followed by a peak-to-peak detector for the amplitude control loop, and switchable output attenuators. | |||
The frequency counter is built from a 10131 ECL prescaler followed by 7490 TTL BCD counters and 7-segment decoders (display not multiplexed). | |||
==Pictures== | ==Pictures== | ||