1240: Difference between revisions

353 bytes added ,  1 July 2017
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image=Tektronix_1240_front_panel.jpeg|
image=Tektronix_1240_front_panel.jpeg|
caption=Tektronix 1240|
caption=Tektronix 1240|
introduced=(?) |
introduced=1983 |
discontinued=(?) |
discontinued=(?) |
summary=Modular Logic Analyzer |
summary=Modular Logic Analyzer |
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==Specifications==
==Specifications==
The 1240/1241 provide up to 72 acquisition channels (one to four acquisition boards with 9 or 18 channels each) at acquisition speeds up to 100 MHz asynchronous or 50 MHz synchronous, 14 levels of triggering with conditional branching.  
The 1240/1241 provide up to 72 acquisition channels (one to four acquisition boards with 9 or 18 channels each) at acquisition speeds up to 100 MHz asynchronous or 50 MHz synchronous, 14 levels of triggering with conditional branching.  
Exchangeable ROM cartridges allow for mnemonic disassembly and state analysis of most microprocessors of the time.


==Internals==
==Internals==
The 1240 is built around an Intel 8088 as the control processor with 64K DRAM, and firmware in a bank of EPROMs. A separate I/O processor board is powered by a Z80A CPU. The display controller is built from individual TTL and ECL ICs.
The power supply is a switch-mode supply that mainly generates 5 V at up to 45 A. It requires a minimum load of 11.6 A. Additionally it generates 3 V at up to 8 A with no minimum load and several other voltages that are derived from linear post regulators.
The power supply is a switch-mode supply that mainly generates 5 V at up to 45 A. It requires a minimum load of 11.6 A. Additionally it generates 3 V at up to 8 A with no minimum load and several other voltages that are derived from linear post regulators.