36,479
edits
067-0587-02: Difference between revisions
no edit summary
No edit summary |
No edit summary |
||
| Line 35: | Line 35: | ||
The staircase generator for Gain mode is implemented using a 4 bit count and multiplexer. The 0-volt step (No. 6) is held for five counts, producing a brighter trace to allow easy alignment with the center of the screen. | The staircase generator for Gain mode is implemented using a 4 bit count and multiplexer. The 0-volt step (No. 6) is held for five counts, producing a brighter trace to allow easy alignment with the center of the screen. | ||
For bandwidth measurements, there is a leveler circuit with a differential diode detector controlling an amplifier's gain in an AGC loop. | For bandwidth measurements, there is a leveler circuit with a [[155-0183-00|differential diode detector]] controlling an amplifier's gain in an AGC loop. | ||
The 067-0587-02 is based on a number of Tektronix custom ICs from the 1 GHz [[7104]] scope generation, such as the [[155-0160-00|155-0160-00 trigger amplifier + source select chip]] and the [[155-0175-00|155-0175-00 trigger amplifier chip]]. | The 067-0587-02 is based on a number of Tektronix custom ICs from the 1 GHz [[7104]] scope generation, such as the [[155-0160-00|155-0160-00 trigger amplifier + source select chip]] and the [[155-0175-00|155-0175-00 trigger amplifier chip]]. | ||