7D20: Difference between revisions

29 bytes added ,  27 February 2022
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==Internals==
==Internals==


The 7D20 uses an analog shift register (CCD) for high-speed signal acquisition, and then digitizes the stored analog signal at a lower speed.  This design allowed the 7D20 to capture single-shot events at 40 MSamples/s even though this exceeded the speed of ADCs of the time.  The 7D20 can digitally store waveforms and has a [[GPIB interface]].  A microprocessor ([[Motorola 6809|68B09]]) in the plug-in controls most of its functions.   
The 7D20 uses an analog shift register (CCD) for high-speed signal acquisition, and then digitizes the stored analog signal at a lower speed (see [[Patent US 4527117A]]).  This design allowed the 7D20 to capture single-shot events at 40 MSamples/s even though this exceeded the speed of ADCs of the time.  The 7D20 can digitally store waveforms and has a [[GPIB interface]].  A microprocessor ([[Motorola 6809|68B09]]) in the plug-in controls most of its functions.   


The analog waveforms that are sent to the 7000-series mainframe are generated by vertical and horizontal DACs.  The DACs outputs can be calibrated for scaling and shift so that signals are accurately displayed on the oscilloscope screen.   
The analog waveforms that are sent to the 7000-series mainframe are generated by vertical and horizontal DACs.  The DACs outputs can be calibrated for scaling and shift so that signals are accurately displayed on the oscilloscope screen.