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It implements the [[Intel 8080]] instruction set, includes a hardware serial port, and requires only a +5 V supply. | It implements the [[Intel 8080]] instruction set, includes a hardware serial port, and requires only a +5 V supply. | ||
The data bus is multiplexed with the lower 8 bits of the address bus, thereby requiring an external latch. | The data bus is multiplexed with the lower 8 bits of the address bus, thereby requiring an external latch. | ||
==Links== | ==Links== |