SG5030: Difference between revisions

492 bytes added ,  1 November 2023
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* [[Media:070-7703-01.pdf|SG5030 Service Manual 070-7703-01]]
* [[Media:070-7703-01.pdf|SG5030 Service Manual 070-7703-01]]
* [[Media:070-7704-00.pdf|SG5030 Interfacing Guide 070-7704-00]]
* [[Media:070-7704-00.pdf|SG5030 Interfacing Guide 070-7704-00]]
* [[Media:070-7706-00.pdf|SG5030 Reference Card 070-7706-00]]
* [[Media:SG5030-991PG.pdf|SG5030 Sales Brochure]]
* [[Media:SG5030-991PG.pdf|SG5030 Sales Brochure]]
{{ROM Images}}
{{ROM Images}}
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==Components==
==Components==
{{Parts|SG5030}}
{{Parts|SG5030}}
The core of the low-frequency (<50 kHz) generation circuit is a DRFS-3250 DDS oscillator (24-bit phase accumulator) chip made by [http://wirelessandhighspeed.com/digital-rf-solutions/ Digital RF Solutions] with two external 2kx8 sine ROMs feeding a 12-bit, 20 MHz DAC (TRW TDC1012).  This DDS is also used for fine frequency control at RF.
The ooutput amplifier contains a Tek-made hybrid amplifier (A7H3070, [[165-2351-00]]).