Patent US 4876214A
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| Patent number | US 4876214A (click link for details and documents via Google Patents) |
|---|---|
| Title | Method for fabricating an isolation region in a semiconductor substrate |
| Inventors | Tadanori Yamaguchi, Evan Patton, Eric Lane, Simon Yu |
| Company | Tektronix Inc |
| Filing date | 1988-06-02 |
| Grant date | 1989-10-24 |