Tadanori Yamaguchi

From TekWiki
Jump to navigation Jump to search

Tadanori Yamaguchi (? – ?)

   Please add referenced biography.

Patents by Tadanori Yamaguchi

Page Office Number Title Inventors Company Filing date Grant date
Patent US 4217599A US 4217599A Narrow channel MOS devices and method of manufacturing Shuichi Sato Tadanori Yamaguchi Arthur D. Ritchie Tektronix Inc 1977-12-21 1980-08-12
Patent US 4229756A US 4229756A Ultra high speed complementary MOS device Shuichi Sato Tadanori Yamaguchi Jack Sachitano Tektronix Inc 1979-02-09 1980-10-21
Patent US 4228447A US 4228447A Submicron channel length MOS inverter with depletion-mode load transistor Shuichi Sato Tadanori Yamaguchi Tektronix Inc 1979-02-12 1980-10-14
Patent US 4261761A US 4261761A Method of manufacturing sub-micron channel width MOS transistor Shuichi Sato Tadanori Yamaguchi Arthur D. Ritchie Tektronix Inc 1979-09-04 1981-04-14
Patent US 4477310A US 4477310A Process for manufacturing MOS integrated circuit with improved method of forming refractory metal silicide areas Hee K. Park Tadanori Yamaguchi Tektronix Inc 1983-08-12 1984-10-16
Patent US 4486266A US 4486266A Integrated circuit method Tadanori Yamaguchi Tektronix Inc 1983-08-12 1984-12-04
Patent US 4902640A US 4902640A High speed double polycide bipolar/CMOS integrated circuit process Jack Sachitano Hee K. Park Paul K. Boyer Gregory C. Eiden Tadanori Yamaguchi Tektronix Inc 1987-08-19 1990-02-20
Patent US 4876214A US 4876214A Method for fabricating an isolation region in a semiconductor substrate Tadanori Yamaguchi Evan Patton Eric Lane Simon Yu Tektronix Inc 1988-06-02 1989-10-24
Patent US 4994400A US 4994400A Method of fabricating a semiconductor device using a tri-layer structure and conductive sidewalls Tadanori Yamaguchi Yeou-Chong S. Yu Carol A. Hacherl Evan E. Patton Tektronix Inc 1989-01-27 1991-02-19