32,070
edits
11A32: Difference between revisions
Jump to navigation
Jump to search
no edit summary
No edit summary |
No edit summary |
||
| Line 15: | Line 15: | ||
{{BeginSpecs}} | {{BeginSpecs}} | ||
{{Spec | Bandwidth | DC to 400 MHz }} | {{Spec | Bandwidth | DC to 400 MHz plus 100 MHz and 20 MHz BWL filters }} | ||
{{Spec | Rise time | 875 ps }} | {{Spec | Number of Inputs | 2 | ||
{{Spec | Deflection | 1 mV to 10V per division }} | {{Spec | Rise time | 875 ps in 1 GHz mainframe}} | ||
{{Spec | Deflection | 1 mV to 10V per division in 1% calibrated steps}} | |||
{{Spec | Input impedance | 50 Ω or 1 MΩ }} | {{Spec | Input impedance | 50 Ω or 1 MΩ }} | ||
{{Spec | Features | | {{Spec | Features | | ||
*High-Resolution Calibrated DC Offset | *High-Resolution Calibrated DC Offset | ||
*Fast Overdrive Recovery | *Fast Overdrive Recovery | ||
*50 Ω mode 5V RMS overload protected with manual reset | |||
}} | }} | ||
{{EndSpecs}} | {{EndSpecs}} | ||