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{{Plugin Sidebar |
#redirect [[DF1]]
manufacturer=Tektronix | type=DF2 |
{{Plugin Sidebar
summary=Display Formatter |
|manufacturer=Tektronix
image=Tek df2.jpg |  
|series=7D01
caption=Tektronix DF2 |
|type=DF2
introduced=1978|
|summary=display formatter
discontinued=1985|
|image=Tek_df2.jpg
series=7D01|
|caption=DF2 front panel
manuals=
|introduced=1978
* [[Media:070-2478-00.pdf|Tektronix DF2 Manual]] (OCR)
|discontinued=1985
|designers=Murlan Kaufman;Dave Lowry;Jeff Bradford;Ed Wolf
|manuals=
{{ROM Images}}
{{ROM Images}}
* U284: [[Media:156-0899-00.bin|156-0899-00]]
* U294: [[Media:156-0900-00.bin|156-0900-00]]
* U820: [[Media:156-1132-00.bin|156-1132-00]]
}}
}}


The '''Tektronix DF2''' is a display formatter for use with the [[7D01]] logic analyzer.
It is a [[DF1]] with special support for debugging GPIB, from which it differs by having an extra front-panel "MENU" key and a daughter board with additional ROMs.
The DF2 does not, however, have a GPIB interface of its own − it can only analyze external GPIB traffic.
This functionality is invoked with the added MENU control (refer to the instruction manual for details). 
Project manager for the DF2 was [[Murlan Kaufman]].
A [[103-0209-00|103-0209-00 GPIB to probe comb adapter]] was supplied with the DF2.  This connects GPIB DIO1..DIO8 to CH8..CH15, DAV to the CLOCK input, ATN to CH7, EOI to CH6, SRQ to CH5, and REN to CH4.  GPIB signals DAV, NRFD, NDAC and IFC brought out to pins on the connector.  CH3..0 are user defined inputs that can track any of these signals, or others as needed.  For GPIB analysis, bus data is acquired synchronously using the negative-going edge of the GPIB DAV (Data Valid) line as an external clock.
{{BeginSpecs}}
{{Spec | Memory | One reference table memory, same as 7D01 capacity (max. 16 channels at 254 bits/ch) }}
{{Spec | Display modes |
* State table: Hexadecimal, octal, or binary formats; two tables (reference, 7D01 memory) of 17 lines of 16-bit words
* Map: Dot display of the 16 data channels in X-Y coordinate points. Each dot location represents one possible combination of up to 16 inputs to the 7D01.
* GPIB: Displays 17 lines of decoded GPIB operations and/or ASCII data, and user-defined input signal states.
* ASCII: Displays 17 lines of decoded ASCII character along with its binary, octal, or hex value, in either 8– or 16–bit modes.
* Timing: Standard 7D01 display – 4, 8 or 16 bits
}}
{{Spec | Reset output | Positive 100 μs pulse, ≤0.4 V / ≥2.4 V }}
{{EndSpecs}}
==Internals==
The DF1 is built around a [[Motorola 6800]] microprocessor with three 2K×8 masked ROMs (one on a ROM expansion board) and sixteen 1K×1 SRAMs (2101).
The 7D01 is often affected by [[bad TI IC sockets]], see [[7D01/Repairs|the Repairs tab]].
==Pictures==
<gallery>
Tek df2.jpg
Tek df2 7d01 lit.jpg
Tek_7D01-DF01_timing.jpg  | 7D01 + [[DF1]] (or [[DF2]]) Timing Diagram
Tek_7D01-DF01_table.jpg  | 7D01 + [[DF1]] (or [[DF2]]) State Table
</gallery>
{{Custom ICs|DF2}}


[[Category:7000 series special-function plugins]]
[[Category:7000 series special-function plugins]]
[[Category:Logic analyzers]]
[[Category:Logic analyzers]]

Latest revision as of 03:51, 2 August 2024

Redirect to:

Tektronix DF2
display formatter
DF2 front panel

Compatible with 7D01

Produced from 1978 to 1985

Manuals
ROM Images
File Pos. Checksum
156-0899-00 U284 a4d703b2
156-0900-00 U294 f84aea79
156-1132-00 U820 411fd974
(All manuals in PDF format unless noted otherwise)
Manuals – Specifications – Links – Pictures