338: Difference between revisions
Jump to navigation
Jump to search
No edit summary |
No edit summary |
||
Line 24: | Line 24: | ||
{{Spec | Probes | [[P6451]] (8-channel) and [[P6107]] (trigger/serial) }} | {{Spec | Probes | [[P6451]] (8-channel) and [[P6107]] (trigger/serial) }} | ||
{{Spec | Number of channels | 32 channels }} | {{Spec | Number of channels | 32 channels }} | ||
{{Spec|Glitch | {{Spec | Glitch detection | On Pod A (8 Channels)}} | ||
{{Spec|Minimum | {{Spec | Minimum logic swing | 500 mV<sub>p-p</sub>}} | ||
{{Spec|Maximum | {{Spec | Maximum logic swing | –15 V to +10 V}} | ||
{{Spec|Maximum non-destructive | {{Spec | Maximum input |±40 V non-destructive }} | ||
{{Spec|Glitch | {{Spec | Glitch data width | 5 ns min}} | ||
{{Spec|Clock | {{Spec | Clock source | Internal or external}} | ||
{{Spec|Data | {{Spec | Data setup time | 14 ns min, 10 ns typ.}} | ||
{{Spec|Data | {{Spec | Data hold time | 0 ns}} | ||
{{Spec|Minimum | {{Spec | Minimum clock period | 50 ns}} | ||
{{Spec|Memory | {{Spec | Memory | | ||
* Reference Memory: 32 x 256 bits | * Reference Memory: 32 x 256 bits | ||
* Aquisition Memory: 32 x 256 bits | * Aquisition Memory: 32 x 256 bits | ||
* Glitch Memory: 8 x 32 bits | * Glitch Memory: 8 x 32 bits | ||
}} | }} | ||
{{Spec | Features | | {{Spec | Features | |
Revision as of 08:53, 21 January 2022
The Sony/Tektronix 338 and its sister model 318 are keyboard-controlled multifunction portable logic analyzers.
The 338 has 32 channels with 20 MHz maximum clock speed and 256 word memory, with a glitch capture function on the lower 8 channels. The standard probes are the P6451 (4 pieces) and P6107 (trigger/serial).
Model 338S1 adds an RS-232 interface, nonvolatile memory, and a serial state analysis function (5 to 9 bits/char, asynchronous or synchronous, two continuous word recognizers, 50 to 19.2K baud; binary, octal, decimal, hexadecimal, ASCII, or EBCDIC display).
Key Specifications
Probes | P6451 (8-channel) and P6107 (trigger/serial) |
---|---|
Number of channels | 32 channels |
Glitch detection | On Pod A (8 Channels) |
Minimum logic swing | 500 mVp-p |
Maximum logic swing | –15 V to +10 V |
Maximum input | ±40 V non-destructive |
Glitch data width | 5 ns min |
Clock source | Internal or external |
Data setup time | 14 ns min, 10 ns typ. |
Data hold time | 0 ns |
Minimum clock period | 50 ns |
Memory |
|
Features |
|
Pictures
-
-
Top view without cover
-
Bottom view without cover
-
Left view without cover
-
Right view without cover