7D01: Difference between revisions
Jump to navigation
Jump to search
(better pic for template (Thanks User:Carbone!)) |
m (caption) |
||
| Line 3: | Line 3: | ||
summary=Logic Analyzer | | summary=Logic Analyzer | | ||
image=Tek 7D01 Front.jpg | | image=Tek 7D01 Front.jpg | | ||
caption=Tektronix 7D01 | caption=Tektronix 7D01 with [[DF1]] | | ||
introduced=1977 | | introduced=1977 | | ||
discontinued=1985 | | discontinued=1985 | | ||
| Line 38: | Line 38: | ||
<gallery> | <gallery> | ||
File:Tek-7704a-7D01.jpg | 7D01 in [[7704A]] mainframe | File:Tek-7704a-7D01.jpg | 7D01 in [[7704A]] mainframe | ||
File:Tek_7D01_Front.jpg | 7D01 Front | File:Tek_7D01_Front.jpg | 7D01+[[DF1]] Front | ||
File:Tek_7D01_timing.jpg | 7D01 Timing Diagram | File:Tek_7D01_timing.jpg | 7D01 Timing Diagram | ||
File:Tek_7D01-DF01_timing.jpg | 7D01 + [[DF1]] Timing Diagram | File:Tek_7D01-DF01_timing.jpg | 7D01 + [[DF1]] Timing Diagram | ||
Revision as of 10:24, 25 November 2014
Template:Plugin Sidebar 2 The Tektronix 7D01 is a logic analyzer plug-in for the 7000-series scopes.
Key Specifications
| Channels |
|
|---|---|
| Sampling Rate | 10 ns to 5 ms per sample (1—2—5) or external clock up to 50 MHz |
| Trigger Sources |
|
please add
