7D15: Difference between revisions

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==Links==
==Links==


* The Oscilloscope Controlled Counter, in [[Media:Tekscope 1972 V4 N5.pdf|Tekscope Vol. 4 No. 5, 1972]]
* The Oscilloscope Controlled Counter, in [[Media:Tekscope 1972 V4 N5 Sep 1972.pdf|Tekscope Vol. 4 No. 5, 1972]]
* [http://www.amplifier.cd/Test_Equipment/Tektronix/Tektronix_7000_series_special/counter_7D15.htm Tek 7D15 page @ amplifier.cd]
* [http://www.amplifier.cd/Test_Equipment/Tektronix/Tektronix_7000_series_special/counter_7D15.htm Tek 7D15 page @ amplifier.cd]
* [http://www.barrytech.com/tektronix/tek7000/tek7d15.html Tek 7D15 page @ barrytech.com]
* [http://www.barrytech.com/tektronix/tek7000/tek7d15.html Tek 7D15 page @ barrytech.com]

Revision as of 16:45, 24 September 2015

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The Tektronix 7D15 is a 225 MHz frequency counter plug-in for 7000-series scopes. It is optimized for timing measurements, having a 100 MHz oscillator and interval measurement averaging capability. It has two inputs and can measure frequency, period or time difference. The 7D15 was introduced in November 1972.

The front panel uses SMB connectors for arming, clock in/out and reset signals.

Key Specifications

     — Frequency Mode
Input frequency DC to 225 MHz
Resolution 0.1 Hz min.
     — Period Mode
Range 10 ns to 105 s, Averaging ×1, ×10, ×100 or ×1000
Resolution 10 ps max.
     — Time Interval Mode
Range 6 ns to 105 s, Averaging ×1, ×10, ×100 or ×1000
Resolution 0.1 ns usable
     — Frequency Ratio Mode
Range 10-7 to 104
     — Totalize Mode
Range 0 to 108 counts
     — Manual Stopwatch Mode
Range 0 to 105 seconds
     — Inputs CH A + CH B
Frequency Range DC (AC coupled: 5 Hz) to 225 MHz
Sensitivity 100 mVp-p (from TRIG SOURCE: 0.5 Div)
Max. input 200 V DC linearly derated to 20 V at 200 MHz
Min. pulse width 5 ns
Input impedance 1 MΩ // 22 pF

Internals

The 7D15 uses a number of Tek-made custom chips. The 155-0086-00, 155-0087-00 and 155-0088-00 legend generators are specific to this plug-in. The 155-0090-00 or 155-0171-00 four decade counter/latch/DAC chips implement the lower six counter digits. For the topmost two digits, the 7D15 employs ECL counters. ECL logic requires a -5 V supply, which a switching regulator (board A8) generates from the -15 V rail.

The 5 MHz signal from the (non-ovenized) internal reference crystal oscillator is divided down to a 1 MHz master clock. Optionally, the 1 MHz can be supplied externally as well. An internal VCO, phase-locked to the 1 MHz master, produces a 100 MHz input to the counter chain for timing measurements.

Links

Prices

Year 1973 1976 1980 1984 1990
Price $1,475 $1,600 $2,200 $3,200 $4,400
2015 value $7,840 $6,640 $6,300 $7,270 $7,950

Pictures

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