7B92: Difference between revisions

From TekWiki
Jump to navigation Jump to search
No edit summary
No edit summary
Line 49: Line 49:


<gallery>
<gallery>
File:Tek 7b92 front.jpg    | 7B92 front
Tek 7b92 front.jpg    | 7B92 front
File:Tek 7b92 right.jpg    | 7B92 right
Tek 7b92 right.jpg    | 7B92 right
File:Tek 7b92 left.jpg    | 7B92 left
Tek 7b92 left.jpg    | 7B92 left
File:7b92a-front.jpg      | 7B92A front
7b92a-front.jpg      | 7B92A front
File:Tek 7b92a right.jpg  | 7B92A right
Tek 7b92a front2.jpg| 7B92A
File:Tek 7b92a left.jpg    | 7B92A left
Tek 7b92a right.jpg  | 7B92A right
File:Tek 7b92a block.png  | 7B92A block diagram
Tek 7b92a left.jpg    | 7B92A left
File:7b92a-triggering-974mhz.jpg  | A 7B92A (B098xxx) triggering a 974 MHz sine applied to a [[7904]] mainframe via a 067-0587-02 calibration fixture (maximum triggerable frequency for this specimen).
Tek 7b92a block.png  | 7B92A block diagram
File:Tek7904-7a19-7b92a-1010mhz-hfsync.jpg | A 7B92A (B098xxx) displaying a 1.01 GHz sine in HF Sync mode on a [[7904]] mainframe via a [[7A19]] amplifier (maximum signal generator frequency).
7b92a-triggering-974mhz.jpg  | A 7B92A (B098xxx) triggering a 974 MHz sine applied to a [[7904]] mainframe via a 067-0587-02 calibration fixture (maximum triggerable frequency for this specimen).
Tek7904-7a19-7b92a-1010mhz-hfsync.jpg | A 7B92A (B098xxx) displaying a 1.01 GHz sine in HF Sync mode on a [[7904]] mainframe via a [[7A19]] amplifier (maximum signal generator frequency).
</gallery>
</gallery>


[[Category:7000 series horizontal plugins]]
[[Category:7000 series horizontal plugins]]

Revision as of 11:30, 14 January 2018

Template:Plugin Sidebar 2 The Tektronix 7B92 is a 500 MHz dual timebase plug-in for 7000-series scopes. It was introduced along with the 7904 mainframe in 1972.

An "HF Sync" triggering mode is provided in which the trigger level control varies the frequency of a built-in oscillator to lock on to the input for input signals from 100 to 500 MHz, providing higher sensitivity than the direct trigger (which is specified up to 500 MHz as well).

Internal jumpers are provided to configure the 7B92 for operation in 7800/7900 vs. slower mainframes, and to select whether the variable control affects the delaying or the delayed time base.

As a dual time base, the 7B92 uses the top field in the display readout for the sweep speed of the main and the bottom field for the delayed time base. The delay time can only be read from the 10-turn analog dial.

The 7B92 has no magnifier function but its regular sweep dial setting reaches down to 500 ps/Div. It also has no provision for X-Y operation.

Key Specifications

Sweep speed 0.5 ns/Div to 0.2 s/Div, 1—2—5 sequence (variable up to 0.5 s/Div)
Delay time 0 to 9.9 Div
Triggering 0.5 Div or 100 mV up to 20 MHz, 1 Div or 500 mV up to 600 MHz
Jitter < 50 ps at 600 MHz
Ext Trig input 1 MΩ // 20 pF or 50 Ω

Internals

The 7B92 uses a discrete trigger circuit containing tunnel diodes.

Up to serial number B069999, the 7B92A used a trigger circuit with 155-0061-00 amplifiers and tunnel diodes. After that, the 7B92A used a 155-0061-00 trigger amplifier followed by a 155-0150-00 trigger detector. The 7B92A uses one other custom IC, the 155-0049-xx sweep control circuit.

Pictures