DC504: Difference between revisions
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==Rear Interface== | ==Rear Interface== | ||
<small> | |||
{| | |||
|- | |||
| 28B − Gate Out, Totalize Start/Stop || 28A − Hold | |||
|- | |||
| 27B − Decimal point || | |||
|- | |||
| || 26A − /Reset | |||
|- | |||
| || 25A − TS1 (digit select 1, MSD) | |||
|- | |||
| 24B − Scan clock out || 24A − TS2 (digit select 2) | |||
|- | |||
| 23B − Overflow || 23A − TS3 (digit select 3) | |||
|- | |||
| 22A − TS4 (digit select 4) || | |||
|- | |||
| 21B − BCD out 2 || 21A − TS5 (digit select 5, LSD) | |||
|- | |||
| 20B − BCD out 8 || 20A − BCD out 4 | |||
|- | |||
| 19B − Latch Out (Data Good) || 19A − BCD out 1 | |||
|- | |||
| || 17 A – Signal Input GND | |||
|- | |||
| || 16A − Signal input | |||
|- | |||
| || 15A – External Clock GND | |||
|- | |||
| || 14A − External Clock (GND on 15A) | |||
|} | |||
</small> | |||
==Internals== | ==Internals== | ||
The DC504 uses a [[Media:Mostek MK5009P.pdf|Mostek MK5009P]] PMOS oscillator/counter IC to control gate times. | The DC504 uses a [[Media:Mostek MK5009P.pdf|Mostek MK5009P]] PMOS oscillator/counter IC to control gate times. | ||
| Line 53: | Line 66: | ||
DC504-inside-copper-side.jpg|DC504 inside; copper side | DC504-inside-copper-side.jpg|DC504 inside; copper side | ||
</gallery> | </gallery> | ||
==Components== | |||
{{Parts|DC504}} | |||
Revision as of 08:49, 19 November 2023
The Tektronix DC504 is a 80 MHz, 5-digit frequency counter plug-in for the TM500 system.
It was superseded by the DC504A in 1984.
Key Specifications
| Frequency Range | DC (AC coupled: 10 Hz) to at least 80 MHz |
|---|---|
| Sensitivity | 20 mVRMS sine wave below 15 MHz, 35 mVRMS to 50 MHz, derated down to 175 mVRMS at 80 MHz |
| Input impedance | 1 MΩ // 20 pF |
| Trigger Level Range | −1.5 V to +1.5 V |
| Frequency Resolution | kHz ranges: 0.1 Hz; 1 Hz and 10 Hz (7 digit resolution possible in overflow kHz position); MHz ranges: 100 Hz, 1 kHz (9 digit resolution possible in overflow kHz position) |
| Period resolution | ms ranges: 1 µs, 10 µs; s ranges: 10 ms, 1 ms, 0.1 ms |
| Display Time | Variable ~0.1 s ... ~10 s and HOLD mode |
| Standard Time Base | 1 MHz, ±1×10-5 from 0°C to +50°C, ±1×10-5 per month, Adjustable to within 1×10-7 |
| Opt. 1 Time Base | 5 MHz, ±1×10-7 from 0°C to +50°C, ±1×10-7 per month, Adjustable to within 1×10-9 |
An internal "RPM" mode switch stretches gate times sixfold, giving a longest gate time of 1 minute with a display scaled in revolutions per minute.
Rear Interface
| 28B − Gate Out, Totalize Start/Stop | 28A − Hold |
| 27B − Decimal point | |
| 26A − /Reset | |
| 25A − TS1 (digit select 1, MSD) | |
| 24B − Scan clock out | 24A − TS2 (digit select 2) |
| 23B − Overflow | 23A − TS3 (digit select 3) |
| 22A − TS4 (digit select 4) | |
| 21B − BCD out 2 | 21A − TS5 (digit select 5, LSD) |
| 20B − BCD out 8 | 20A − BCD out 4 |
| 19B − Latch Out (Data Good) | 19A − BCD out 1 |
| 17 A – Signal Input GND | |
| 16A − Signal input | |
| 15A – External Clock GND | |
| 14A − External Clock (GND on 15A) |
Internals
The DC504 uses a Mostek MK5009P PMOS oscillator/counter IC to control gate times. The first counter stage is a Signetics 82S90 85(100) MHz decade counter, followed by four 7490 decade counters, 7475 latches, and 7401s to multiplex the output/display.
Pictures
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DC504
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DC504
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DC504
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DC504
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DC504
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DC504
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DC504 inside; component side
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DC504 inside; copper side
Components
Some Parts Used in the DC504
| Part | Part Number(s) | Class | Description | Used in |
|---|---|---|---|---|
| 2N4249 | 151-0342-00 | Discrete component | PNP Si low noise amp. | DC501 • DC502 • DC503 • DC503A • DC504 • DC504A • DC505 • DC505A • DC508 • DC508A • DC509 • DC510 |
| Mostek MK5009 | 156-0410-00 | Monolithic integrated circuit | oscillator/counter | DC504 |
| Signetics 82S90 | 156-0482-01 | Monolithic integrated circuit | 85(100) MHz decade counter | DC504 |