7D01: Difference between revisions

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945 bytes added ,  26 November 2014
Note about external clock rate performance.
(7D01 pic without DF for template)
(Note about external clock rate performance.)
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{{BeginSpecs}}
{{BeginSpecs}}
{{Spec | Channels |  
{{Spec | Channels |  
* 4 channels at 1016 bits/channel
* 4 channels at 1016 bits/channel, maximum external clock period 10ns (100MHz)
* 8 channels at 508 bits/channel
* 8 channels at 508 bits/channel, maximum external clock period 20ns (50MHz)
* 16 channels at 254 bits/channel
* 16 channels at 254 bits/channel, maximum external clock period 40ns (25MHz)
 
'''Note about external clock rates''' (from Jim Mauck):
 
''When I was a Tek Service Technician I worked on the 7D01. For several years I tested every 7D01 I worked on (and that was a lot of them) with a 100MHz external clock in 16 channel mode. I would use a DF2 and set it to reacquire continuously as long as the 7D01 memory was the same as the original data I stored into the DF2 memory. The analyzer would run for hours without error. The funny part is that it wasn't until I had been doing this for several years that I realized it wasn't specified to run at that frequency. I continued to test them that way even after I discovered my error. However the instrument exceeding the specifications might be due to the data source providing a generous setup and hold time relative to the active clock edge.''
}}
}}
{{Spec | Sampling Rate | 10 ns to 5 ms per sample (1—2—5) or external clock up to 50 MHz}}
{{Spec | Sampling Rate | 10 ns to 5 ms per sample (1—2—5) or external clock up to 50 MHz}}
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