7S12: Difference between revisions

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325 bytes added ,  23 April 2015
sub-nanosecond rise time measurement
(headline)
(sub-nanosecond rise time measurement)
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===Inside===
===Inside===
<gallery>
<gallery>
Image:7s12-left.jpg | Left side
File:7s12-left.jpg | Left side
Image:7s12-left-cover.jpg | Left side with cover.  Side contacts to interface [[7S11]] are exposed.
File:7s12-left-cover.jpg | Left side with cover.  Side contacts to interface [[7S11]] are exposed.
Image:7s12-right.jpg | Right side
File:7s12-right.jpg | Right side
Image:7s12-top.jpg | Top view
File:7s12-top.jpg | Top view
Image:7s12-horizontal.jpg | Horizontal board
File:7s12-horizontal.jpg | Horizontal board
Image:7s12-vertical.jpg | Vertical board
File:7s12-vertical.jpg | Vertical board
</gallery>
</gallery>
===Measurements===
===Measurements===
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File:7s12-7s11-1ghz-nonstore.jpg | [[7S11]] with [[S-4]] and 7S12 with [[S-6]] and [[S-53]] displaying a 1 GHz sine in normal mode without storage. Sampling is evident.
File:7s12-7s11-1ghz-nonstore.jpg | [[7S11]] with [[S-4]] and 7S12 with [[S-6]] and [[S-53]] displaying a 1 GHz sine in normal mode without storage. Sampling is evident.
File:7s12-7s11-1ghz-store2.jpg |  [[7S11]] with [[S-4]] and 7S12 with [[S-6]] and [[S-53]] displaying a 1 GHz sine in high-res mode with variable-persistence storage on a [[7613]].
File:7s12-7s11-1ghz-store2.jpg |  [[7S11]] with [[S-4]] and 7S12 with [[S-6]] and [[S-53]] displaying a 1 GHz sine in high-res mode with variable-persistence storage on a [[7613]].
 
File:P6202-risetime-7s12-1ns.jpg | Rise time of a [[P6202]] 500 MHz FET probe measured on a 7S12 with [[S-52]] and [[S-4]] (in a [[7844]] mainframe), at 1 ns/Div
File:P6202-risetime-7s12-100ps.jpg | Rise time of a [[P6202]] 500 MHz FET probe measured on a 7S12 with [[S-52]] and [[S-4]] (in a [[7844]] mainframe), at 100 ps/Div
</gallery>
</gallery>


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