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11401: Difference between revisions
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→Vertical Signal Path
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The sampling pulse is generated by an ECL 2-input OR gate being fed SAMPLE_CLOCK and delay_5ns(invert(SAMPLE_CLOCK)). | The sampling pulse is generated by an ECL 2-input OR gate being fed SAMPLE_CLOCK and delay_5ns(invert(SAMPLE_CLOCK)). | ||
This produces 5ns pulses with rise time around 1 ns. | This produces 5ns pulses with rise time around 1 ns. | ||
The | The 5 ns pulses are fed to a discrete NPN differential pair operating in a clipping current-switch mode, | ||
resulting in faster edges. | resulting in faster edges. | ||
The output of the differential pair drive a strobe generator IC, U1040, which is an M453 die, | The output of the differential pair drive a strobe generator IC, U1040, which is an M453 die, | ||
packaged as part number [[155-0320-00]] or 155-0320-01, depending on the mainframe's serial number. | packaged as part number [[155-0320-00]] or 155-0320-01, depending on the mainframe's serial number. | ||
U1040 has three sampling strobe outputs, which are fed to the sampling gates. | U1040 has three sampling strobe outputs, which are fed to the sampling gates. | ||
The plug-in connector's differential "DISPLAY" pins are connected to the samplers by coaxial cable, i.e. | The plug-in connector's differential "DISPLAY" pins are connected to the samplers by coaxial cable, | ||
no high-speed amplifiers in the mainframe's signal path. | i.e. there are no high-speed amplifiers in the mainframe's signal path. | ||
The DISPLAY+ and DISPLAY- signals are fed to separate samplers. | The DISPLAY+ and DISPLAY- signals are fed to separate samplers. | ||
The sampled signals are combined in the channel switch to obtain a single-ended signal that is fed to the ADC. | The sampled signals are combined in the channel switch to obtain a single-ended signal that is fed to the ADC. | ||