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DF1 (view source)

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|discontinued=1985
|discontinued=1985
|manuals=
|manuals=
'''DF1'''
* [[Media:070-2149-00.pdf|DF1 Operators Manual]] (OCR)
* [[Media:070-2149-00.pdf|DF1 Operators Manual]] (OCR)
* [[Media:070-2150-00.pdf|DF1 Instruction Manual]] (OCR)
* [[Media:070-2150-00.pdf|DF1 Instruction Manual]] (OCR)
* [[Media:DF1 Brochure 1976.pdf|Tektronix DF1 Brochure 1976]]
'''DF2'''
* [[Media:070-2478-00.pdf|Tektronix DF2 Manual]] (OCR)
* [[Media:Tek_DF1_DF2_Anleitung_Deutsch.pdf|Tektronix DF1/DF2 Anleitung]] (Operators Manual, German, OCR)
* [[Media:Tek_DF1_DF2_Anleitung_Deutsch.pdf|Tektronix DF1/DF2 Anleitung]] (Operators Manual, German, OCR)
* [[Media:DF1 Brochure 1976.pdf|Tektronix DF1 Brochure 1976]]
 
<small>
<small>
'''Alternate copy'''
'''Alternate copies'''
* [http://w140.com/smb/df1_sm.pdf Tektronix DF1 Manual] (OCR)
* [http://w140.com/smb/df1_sm.pdf Tektronix DF1 Manual] (OCR)
</small>
</small>
{{ROM Images}}
{{ROM Images}}
* U284: [[Media:156-0899-00.bin|156-0899-00]]
* U284: [[Media:156-0899-00.bin|156-0899-00]] (2k×8, GI RO-3-8316 or [[Mostek MK31000]])
* U294: [[Media:156-0900-00.bin|156-0900-00]]
* U294: [[Media:156-0900-00.bin|156-0900-00]] (2k×8, GI RO-3-8316 or [[Mostek MK31000]])
* U820: [[Media:156-1132-00.bin|156-1132-00]] (2k×8, [[6831B]], DF2 only)
}}
}}
The '''Tektronix DF1''' is a display formatter for use with the [[7D01]] logic analyzer. It adds "data domain displays" (binary, octal and hexadecimal state tables, and a function map display) to the 7D01's time-domain display. It can store a reference table, to which the captured data can be compared.  The [[DF2]] is essentially a DF1 with an extra key ("Menu") and additional ROM supporting GPIB diagnostics.
The '''Tektronix DF1''', [[introduced in 1977]], is a "display formatter" for use with the [[7D01]] logic analyzer. It adds "data domain displays" (binary, octal and hexadecimal state tables, and a function map display) to the 7D01's time-domain display. It can store a reference table, to which the captured data can be compared.  The DF1 was [[introduced in 1977]].


Project manager for the DF1 was [[Murlan Kaufman]].
The '''Tektronix DF2''', [[introduced in 1978]], is the same as the DF1 with the exception of an added front-panel "Menu" key and an additional ROM (on a daughter board) that supports GPIB and ASCII modes.


The DF01 attaches to the 7D01 through a 50-pin [[D-sub connector]] on the right side panel only, it has no direct connection to the scope mainframe.  The DF1 and 7D01 are mechanically coupled by three nylon standoffs that slide into cutouts in the 7D01's case rails. The bottom two standoffs are fixed and are inserted first, then the connector is plugged in and the third, sliding, stand-off at the top is moved to its locked position.
The DF2 does not have a GPIB interface, it can only analyze external GPIB traffic.  For this purpose, a [[103-0209-00|103-0209-00 GPIB to probe comb adapter]] was supplied with the DF2.  This connects GPIB DIO1..DIO8 to CH8..CH15, DAV to the CLOCK input, ATN to CH7, EOI to CH6, SRQ to CH5, and REN to CH4.  GPIB signals DAV, NRFD, NDAC and IFC brought out to pins on the connector.  CH3..0 are user defined inputs that can track any of these signals, or others as needed. For GPIB analysis, bus data is acquired synchronously using the negative-going edge of the GPIB DAV (Data Valid) line as an external clock.
 
Project manager for the DF1/DF2 was [[Murlan Kaufman]].


{{BeginSpecs}}
{{BeginSpecs}}
{{Spec | Memory | One reference table memory, same as 7D01 capacity (max. 16 channels at 254 bits/ch) }}
{{Spec | Memory | One reference table memory, 1kB, same as 7D01 capacity (max. 16 channels at 254 bits/ch), plus 1kB display RAM }}
{{Spec | Display modes |
{{Spec | Display modes |
'''7D01/7D02'''
* Timing: Standard 7D01 display – 4, 8 or 16 bits
* State table: Hexadecimal, octal, or binary formats; two tables (reference, 7D01 memory) of 17 lines of 16-bit words
* State table: Hexadecimal, octal, or binary formats; two tables (reference, 7D01 memory) of 17 lines of 16-bit words
* Map: Dot display of the 16 data channels in X-Y coordinate points. Each dot location represents one possible combination of up to 16 inputs to the 7D01.
* Map: Dot display of the 16 data channels in X-Y coordinate points. Each dot location represents one possible combination of up to 16 inputs to the 7D01.
* Timing: Standard 7D01 display – 4, 8 or 16 bits
'''7D02 only'''
* GPIB: Displays 17 lines of decoded GPIB operations and/or ASCII data, and up to four user-defined input signal states.
* ASCII: Displays 17 lines of decoded ASCII character along with its binary, octal, or hex value, in either 8– or 16–bit modes.
}}
}}
{{Spec | Reset output | Positive 100 μs pulse, ≤0.4 V / ≥2.4 V }}
{{Spec | Reset output | Positive 100 μs pulse, ≤0.4 V / ≥2.4 V }}
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==Internals==
==Internals==
The DF1 is built around a [[Motorola 6800]] microprocessor with two 2K×8 masked ROMs and sixteen 1K×1 SRAMs (2101).  
An internal jumper allows the user to select the source of the on-screen readout in timing diagram mode, which can be either the mainframe readout supplied by the 7D01, or superimposed by the DF1/DF2.  The latter is the standard setting and allows the DF1/DF2+7D01 combination to be used in mainframes without readout, e.g. the large-screen [[7603N]].


The DF1 and 7D01 are often affected by [[bad TI IC sockets]], see [[7D01/Repairs|the Repairs tab]].
The DF1/DF2 has no direct connection to the scope mainframe, it attaches to the 7D01 through a 50-pin [[D-sub connector]] on the right side panel only.  The DF1/DF2 and 7D01 are mechanically coupled by three nylon standoffs that slide into cutouts in the 7D01's case rails. The bottom two standoffs are fixed and are inserted first, then the connector is plugged in and the third, sliding, stand-off at the top is moved to its locked position.


The DF1/DF2 is built around a [[Motorola 6800]] microprocessor with two (DF2: three) 2K×8 masked ROMs and sixteen 1K×1 SRAMs ([[Intel 2102]]).
The DF1, DF2 and 7D01 are often affected by [[bad TI IC sockets]], see [[7D01/Repairs|the Repairs tab]].
===Memory map===
<small>
{| class="wikitable"
|-
! Address (hex)
! Use
|-
| 0000-007F || Scratchpad RAM (U274, Motorola 6810A)
|-
| 0080-00FF || I/O registers
|-
| 4000-47FF || ROM U820 on DF2 expansion board (156-1132-00, 2k×8, [[6831B]])
|-
| 4800-4FFF || ROM socket on DF2 expansion board, unused
|-
| 5000-57FF || ROM socket on DF2 expansion board, unused
|-
| 5800-5FFF || ROM socket on DF2 expansion board, unused
|-
| 6000-63FF || 1k RAM
|-
| 8000-63FF || 1k display RAM, "write-only"
|-
| Axxx      || Vertical map address register (→ U552, U554)
|-
| Cxxx      || Horizontal map address register (→ U452, U454)
|-
| F000-F7FF || ROM U294 (156-0900-00, 2k×8, GI RO-3-8316 or [[Mostek MK31000]])
|-
| F800-FFFF || ROM U284 (156-0899-00, 2k×8, GI RO-3-8316 or [[Mostek MK31000]])
|-
|}
</small>
==Pictures==
==Pictures==
===DF1===
<gallery>
<gallery>
Tek df1 front.JPG|Front
Tek df1 front.JPG                               | DF1 front panel
Tek df1 internal.JPG|Internal
Tek 7d01 and df1 in 7313.jpg                    | [[7D01]] and DF1 in [[7313]]
Tek DF1 right 0670-4661-01.jpg                  | DF1 internal, right side
Tek DF1 left 0670-4662-00 with ROMs removed.jpg | DF1 internal, left side, ROM chips removed from sockets
Tek DF1 left with ROM adapter.jpg              | DF1 internal, left side, with ROM replacement piggyback board
Tek DF1 keyboard PCB.jpg                        | DF1 front with faceplate removed, showing keyboard PCB
 
Tek df1 internal right.jpg
Tek df1 internal right.jpg
Tek df1 side connector.JPG|Side connector
Tek df1 side connector.JPG | Side connector
Tek df1 right internal1.jpg
Tek df1 right internal1.jpg
Tek df1 right internal2.jpg
Tek df1 right internal2.jpg
Tek df1 right internal3.jpg
Tek df1 right internal3.jpg
Tek 7d01 and df1 in 7313.jpg|[[7D01]] and DF1 in [[7313]]
 
Tek_7D01-DF01_timing.jpg | 7D01 + [[DF1]] (or [[DF2]]) Timing Diagram
</gallery>
Tek_7D01-DF01_table.jpg   | 7D01 + [[DF1]] (or [[DF2]]) State Table
 
===DF2===
<gallery>
Tek df2.jpg                | DF2 front panel
Tek df2 7d01 lit.jpg
</gallery>
 
===Displays===
<gallery>
Tek_7D01-DF01_timing.jpg   | 7D01 + DF1/DF2 Timing Diagram (with DF1/DF2 readout)
Tek_7D01-DF01_table.jpg   | 7D01 + DF1/DF2 State Table example - 8 bit mode, 7D01 table left with highlighted differences to DF1/DF2 reference table on the right
</gallery>
</gallery>


{{Custom ICs|DF1}}


[[Category:7000 series special-function plugins]]
[[Category:7000 series special-function plugins]]
[[Category:Logic analyzers]]
[[Category:Logic analyzers]]
Retrieved from "https://w140.com/tekwiki/wiki/Special:MobileDiff/71827"

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