39,721
edits
No edit summary |
No edit summary |
||
Line 24: | Line 24: | ||
When used by itself, it only displays a timing diagram that can be positioned and zoomed using analog controls, and uses the mainframe's [[7000 series readout system|readout system]] to indicate the cursor position (on top) and the binary data pattern at the cursor location (using the two bottom readout fields). | When used by itself, it only displays a timing diagram that can be positioned and zoomed using analog controls, and uses the mainframe's [[7000 series readout system|readout system]] to indicate the cursor position (on top) and the binary data pattern at the cursor location (using the two bottom readout fields). | ||
When combined with an optional [[DF1]] or [[DF2]] display formatter (attached to the left of the 7D01 through a [[D-sub connector|DD-50 connector]]), data domain displays (state table and map) become available. | When combined with an optional [[DF1]] or [[DF2]] display formatter (attached to the left of the 7D01 through a [[D-sub connector|DD-50 connector]]), data domain displays (state table and map) become available, and the formatter generates the readout in timing diagram mode, allowing a 7D01 with display formatter to be used in mainframes without readout, e.g. the large-screen [[7603N]]. | ||
The 9<sup>th</sup> channel on the first probe serves as an external clock input, that on the second probe as an external qualifier. | The 9<sup>th</sup> channel on the first probe serves as an external clock input, that on the second probe as an external qualifier. |