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2230: Difference between revisions
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{{SpecGroup | Vertical}} | {{SpecGroup | Vertical}} | ||
{{Spec | Input impedance | 1 MΩ // 20 pF }} | {{Spec | Input impedance | 1 MΩ // 20 pF }} | ||
{{Spec | Maximum Safe Input Voltage | 400 V ( | {{Spec | Maximum Safe Input Voltage | 400 V (DC + peak AC) or 800 V<sub>p-p</sub> AC}} | ||
{{Spec | CMRR | At least 10:1 at 10 MHz }} | {{Spec | CMRR | At least 10:1 at 10 MHz }} | ||
{{SpecGroup | Horizontal}} | {{SpecGroup | Horizontal}} | ||
{{Spec | Timebase A| 50 ns/Div to 0.5 s/Div, 1-2-5, x10 magnifier, i.e. down to 5 ns/Div. In "Store" mode lower sweep speeds up to 5 s/Div are available}} | {{Spec | Timebase A | 50 ns/Div to 0.5 s/Div, 1-2-5, x10 magnifier, i.e. down to 5 ns/Div. In "Store" mode lower sweep speeds up to 5 s/Div are available}} | ||
{{Spec | Timebase B| 50 ns/Div to 5 s/Div, 1-2-5, x10 magnifier, i.e. down to 5 ns/Div}} | {{Spec | Timebase B | 50 ns/Div to 5 s/Div, 1-2-5, x10 magnifier, i.e. down to 5 ns/Div}} | ||
{{Spec | Bandwidth | 100 MHz (analog) }} | {{Spec | Bandwidth | 100 MHz (analog) }} | ||
{{Spec | Sampling rate | 20 MS/s }} | {{Spec | Sampling rate | 20 MS/s }} | ||
{{Spec | Record length | 1K or 4K samples (single channel), optional 26K }} | {{Spec | Record length | 1K or 4K samples (single channel), optional 26K }} | ||
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* Dual time base | * Dual time base | ||
* Cursors and readout | * Cursors and readout | ||
* GPIB and Memory (option 10) | * [[GPIB]] and Memory (option 10) | ||
* [[RS-232 interface]] and Memory (option 12) | * [[RS-232 interface]] and Memory (option 12) | ||
}} | }} | ||
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==Internals== | ==Internals== | ||
The 2230 is controlled by an [[Intel 8088]] microprocessor with firmware in a pair of 27512 EPROMs, and six TMS4426 16K×4 DRAMs. The A/D converter is a Sony CX20052A (8 bit, 20 MHz, ECL output). A pair of MCM2016H 2K×8, 70 ns RAMs serve as acquisition memory. | The 2230 is controlled by an [[Intel 8088]] microprocessor with firmware in a pair of 27512 EPROMs, and six TMS4426 16K×4 DRAMs. | ||
The A/D converter is a Sony CX20052A (8 bit, 20 MHz, ECL output). A pair of MCM2016H 2K×8, 70 ns RAMs serve as acquisition memory. | |||
Custom Tek chips used include [[155-0274-00]] (A1U130, A1U180), [[155-0273-00]] (A2U30, A2U80), and [[155-0022-00]] (A10U2101). There is also a semi-custom part (A10U9208 Display Controller, 156-2452-00). | Custom Tek chips used include [[155-0274-00]] (A1U130, A1U180), [[155-0273-00]] (A2U30, A2U80), and [[155-0022-00]] (A10U2101). | ||
There is also a semi-custom part (A10U9208 Display Controller, 156-2452-00). | |||
==Pictures== | ==Pictures== | ||
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Tek 2230 right.jpg | Tek 2230 right.jpg | ||
Tek 2230 interface.jpg | standard interface board (X-Y) | Tek 2230 interface.jpg | standard interface board (X-Y) | ||
Tek-2230f10-1.jpg | 2230 [[GPIB interface]] board | Tek-2230f10-1.jpg | 2230 [[GPIB interface]] board | ||
Tek 2230 open.jpg | | Tek 2230 open.jpg | During repairs | ||
2230topboard.JPG | 2230topboard.JPG | uppermost board (A10, CPU and acquisition) | ||
Tek 2230 service.jpg | CPU/acquisition board in service position | Tek 2230 service.jpg | CPU/acquisition board in service position | ||
</gallery> | </gallery> | ||