39,552
edits
No edit summary |
No edit summary |
||
Line 11: | Line 11: | ||
* specification of the 16-bit trigger word, including any don't-care bits | * specification of the 16-bit trigger word, including any don't-care bits | ||
It produces a pulse at its output when the trigger word is recognized. | It produces a pulse at its output when the trigger word is recognized. | ||
==Links== | |||
* [[Media:Tekscope_1976_V8_N2.pdf|Tekscope Volume 8 Number 2, 1976, p.8+ – Pete Janowitz, ''A plug-in word recognizer with digital delay'']] | |||
==Internals== | ==Internals== | ||
Line 18: | Line 21: | ||
The WR 501 includes a delay function and can provide a trigger signal for an oscilloscope or provide a trigger signal and data acquisition for the [[LA501]] Logic Analyzer. | The WR 501 includes a delay function and can provide a trigger signal for an oscilloscope or provide a trigger signal and data acquisition for the [[LA501]] Logic Analyzer. | ||
Note that DL15 and DL115, the 24 pin delay lines that fit in the sockets on each board are | Note that DL15 and DL115, the 24-pin delay lines that fit in the sockets on each board are | ||
only found on units that were interconnected to an LA 501. The empty socket for DL15 is visible | only found on units that were interconnected to an LA 501. The empty socket for DL15 is visible | ||
in the pictures below, on the A1 daughter board. The socket for DL115 is on the board underneath A1, | in the pictures below, on the A1 daughter board. The socket for DL115 is on the board underneath A1, | ||
on the A2 main board. They are unnecessary if you are using the WR501 to trigger a scope. | on the A2 main board. They are unnecessary if you are using the WR501 to trigger a scope. | ||
These ECL delay lines, | These ECL delay lines, P/N 119-0775-00, 10 ns, 100 Ω, can be found in the [[7D01]] logic analyzer plugin for the [[7000-series scopes]]. | ||
for the [[7000-series scopes]]. | |||
==Pictures== | ==Pictures== | ||
<gallery> | <gallery> | ||
Wr501_front.jpg|Front | |||
Wr501_left.jpg|Left internal | |||
Wr501_left2.jpg|Left internal | |||
Wr501_right.jpg|Right internal | |||
Wr501_connector.jpg|Logic pod connector | |||
Tek wr501 block.png|Block diagram | |||
</gallery> | </gallery> |