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SG503: Difference between revisions
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The SG503 uses two LC Hartley oscillators, one for 100 MHz and above with an air-core inductor, the other for the lower ranges using switched ferrite-core inductors. Tuning is accomplished via a traditional three-section variable capacitor. After filtering, a regulated power amplifier stage (caution: [[beryllium oxide]] in transistor cases!) is followed by a peak-to-peak detector for the amplitude control loop, and switchable output attenuators. | The SG503 uses two LC Hartley oscillators, one for 100 MHz and above with an air-core inductor, the other for the lower ranges using switched ferrite-core inductors. Tuning is accomplished via a traditional three-section variable capacitor. After filtering, a regulated power amplifier stage (caution: [[beryllium oxide]] in transistor cases!) is followed by a peak-to-peak detector for the amplitude control loop, and switchable output attenuators. | ||
The frequency counter | The frequency counter circuit starts with a ÷8 prescaler (SP1670 and 10131 ECL flip-flops) followed by 7490 TTL BCD counters and 7-segment decoders (display not multiplexed). | ||
==Notes== | ==Notes== | ||