Zilog Z-80: Difference between revisions

Zilog Z-80 (view source)

46 bytes added , 25 September 2024

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 It implements an upward-compatible extension of the [[Intel 8080]] instruction set, and requires only a +5 V supply.
-It adds several registers, a vectored interrupt system, and a hardware DRAM refresh counter to the 8080 architecture.
+It adds several registers, indexed addressing modes, a vectored interrupt system, and a hardware DRAM refresh counter to the 8080 architecture.
-There were several speed grades, initially starting at 2.5 MHz (non-suffix) / 4 MHz (Z80A) / 6 MHz (Z80B), etc., later CMOS versions up to 20 MHz, and derivatives up to about 50 MHz. Several second-source manufacturers produced their versions of this CPU.
+There were several speed grades, initially starting at 2.5 MHz (non-suffix) / 4 MHz (Z80A) / 6 MHz (Z80B), etc.  Later CMOS versions were available with up to 20 MHz, and derivatives up to about 50 MHz. Several second-source manufacturers produced their versions of this CPU.
 The '''National Semiconductor NSC800''' is code-compatible with the Z-80 but has a multiplexed address/data bus like the [[Intel 8085]], without being pin compatible with either.